Space & Defense Semiconductors

Space and defense electronics run on a separate semiconductor supply chain. Commercial chips fail quickly in orbit and on the battlefield, so this sector buys parts built or designed to survive radiation, temperature extremes, shock and vibration. A small group of U.S. government-approved fabs, led by BAE Systems, Honeywell and Microchip, supplies the fully hardened parts. A newer group of commercial designs from SpaceX and NVIDIA is taking over low Earth orbit (LEO) compute using standard TSMC silicon, and the Golden Dome missile defense program is moving much of U.S. defense demand into LEO as well.

The radiation threats are well defined. Galactic cosmic rays, solar particle events and the trapped radiation belts cause single-event upsets (SEU, a flipped bit), single-event latch-up (SEL, a short circuit that can destroy a chip) and total ionizing dose (TID, slow damage that builds up over a mission). Military platforms add temperature cycling from -55C to +125C, mechanical shock, sustained vibration, salt fog and electromagnetic pulse (EMP).

Rad-Hard vs Rad-Tolerant Semiconductors

Radiation-hardened (rad-hard) and radiation-tolerant (rad-tolerant) chips solve the same problem in different factories.

• Rad-hard chips are built on modified processes that resist radiation at the transistor level. Silicon-on-insulator (SOI) wafers remove the bulk silicon path that latch-up currents use. Hardened gate oxides resist the charge trapping that causes TID damage. Enclosed (annular) gate layouts remove the transistor edges where radiation-induced leakage flows. These changes do not work with the FinFET and gate-all-around transistors used at N5 and below, so rad-hard fabs run 45nm to 350nm processes. Parts are certified to MIL-STD-883, QML-V and the European ESCC standards.
• Rad-tolerant chips use unmodified commercial processes at TSMC, GlobalFoundries or Samsung and handle radiation in the design. Triple modular redundancy (TMR) runs logic three times and takes a majority vote, at three times the area and power. Error-correcting code (ECC) fixes single-bit memory errors. Latch-up protection circuits cut power before damage occurs. Scrubbing reloads FPGA configuration memory to clear accumulated bit flips. Because the process is unchanged, these chips can use N7, N5 and N3.

Rad-hard parts cover every orbit, including geosynchronous orbit (GEO), medium Earth orbit (MEO) and deep space. Rad-tolerant parts work well in LEO, where the radiation environment is mild enough for design-level fixes, and struggle in MEO, inside the Van Allen belts.

Space and Defense Semiconductor Device Map

SpaceX D3 (AI7) Orbital Compute Chip

D3, also called AI7, is the orbital member of the Tesla and SpaceX chip family covered on the Tesla Terafab Supply Chain page. AI5 runs Tesla FSD and is built at Samsung Taylor and TSMC Arizona. AI6 serves Cybercab and Optimus. D3 is the payload compute chip for next-generation Starlink satellites.

Starlink flies at about 550km. Radiation there peaks over the South Atlantic Anomaly, a zone of weak magnetic shielding with 10 to 100 times the proton flux of the rest of LEO, and during solar storms. The environment is harsher than CubeSat orbits and milder than MEO, where GPS satellites fly, or GEO.

D3 is reported to use TMR on critical logic, ECC on all memory, scrubbing and latch-up protection, all on a commercial TSMC node. That choice gives D3 enough compute for on-orbit beamforming, image processing and autonomy, which BAE's 45nm to 250nm processes cannot deliver. D3 still takes occasional upsets, and its orbital life is capped by accumulated TID.

At Starlink Gen 3 build rates of thousands of satellites a year, D3 volumes would exceed the entire traditional rad-hard IC market. Success would make TSMC nodes the standard path for LEO compute. In-orbit reliability problems would push LEO programs back toward rad-hard fabs.

SpaceX Starmind Orbital Compute Satellites

Starmind is the SpaceX orbital datacenter constellation. Each satellite carries AI1, a compute payload SpaceX and NVIDIA are developing together around NVIDIA Rubin GPUs and Vera CPUs. D3 runs the Starlink network; Starmind sells compute.

• Orbit: LEO between about 500km and 2,000km, favoring sun-synchronous orbit (SSO), where the satellites stay in near-constant sunlight for solar power.
• Scale: SpaceX has asked the FCC to authorize up to one million orbital datacenter satellites. The FCC granted an initial application; the full deployment is still under review.
• Hardware: AI1 is built on the NVIDIA Space-1 Vera Rubin platform, and SpaceX designed the payload so later satellites can take processors from other suppliers.
• Schedule: prototype testing is planned for early 2027, with mass production to follow if testing holds.

Starmind would turn LEO into a volume market for leading-edge TSMC N3 silicon. It inherits the Space-1 problems: rejecting GPU heat by radiation alone, and holding error rates down without rad-hard processes.

NVIDIA Space Computing: Space-1 Vera Rubin, IGX Thor and Jetson Orin

NVIDIA announced a three-tier space compute line at GTC 2026 (March 16, 2026). Unlike D3, these are products any satellite operator can buy.

• Space-1 Vera Rubin Module: the Rubin GPU from NVIDIA's NVL72 racks (TSMC N3, 336 billion transistors, 50 PFLOPS FP4) with the 88-core Vera ARM CPU, for orbital datacenters running large language models. Reports point to two superchips running in lockstep, comparing results to catch radiation errors, which doubles the silicon per unit. NVIDIA rates it at 25 times H100 performance for space inference.
• IGX Thor: Blackwell-based compute with functional safety and secure boot for mission-critical spacecraft. Jensen Huang said at GTC that it is radiation approved and already flying.
• Jetson Orin: low size, weight and power (SWaP) compute for vision, navigation and sensor processing on CubeSats and smallsats.

Cooling holds Space-1 back. In orbit there is no air for convection, so heat leaves only as infrared radiation from panels. A Rubin GPU needs liquid cooling on the ground, and Huang said NVIDIA engineers are still working on the orbital thermal design.

The six launch partners show where demand is forming:

• Aetherflux: solar-powered LEO compute; first datacenter satellite planned for Q1 2027.
• Planet: tested IGX Thor and plans it for next-generation imaging satellites, cutting on-orbit image processing from hours to seconds.
• Kepler Communications: optical data relay constellation using NVIDIA compute for on-orbit processing.
• Axiom Space: commercial ISS module with onboard compute.
• Starcloud: orbital datacenter operator.
• Sophia Space: orbital compute partner.

U.S. Rad-Hard Foundries and Trusted Supply

The Defense Microelectronics Activity (DMEA) in McClellan Park, California runs the Trusted Foundry program and works with the Defense Logistics Agency's QML-38535 list of qualified manufacturers. Trusted Foundry accreditation covers fabs where access to designs, mask sets or yield data would compromise classified programs. Three fabs anchor U.S. rad-hard supply:

• BAE Systems Microelectronics, Manassas, Virginia: the main source of rad-hard processors and ASICs. The RAD750 has flown on most major NASA missions since 2000, including Perseverance and the James Webb Space Telescope; the RAD5545 is its successor.
• Honeywell Aerospace, Plymouth, Minnesota: rad-hard SiGe BiCMOS, CMOS, analog and inertial navigation silicon.
• Microchip Technology, Colorado Springs, Colorado (former Atmel and Microsemi): RTG4 FPGAs, rad-hard SRAM and flash, and rad-hard power management.

All three are ITAR-controlled. The International Traffic in Arms Regulations (ITAR) cover items on the U.S. Munitions List, which includes most military rad-hard chips. Staff must be U.S. persons, foreign buyers need State Department export licenses that can take months or be refused, and the UK, France, Germany and Japan have built their own rad-hard supply, including Thales, to avoid ITAR dependence.

The performance gap is the core limit of this supply chain. The RAD5545 delivers about 5 GFLOPS, roughly a 2005-era commercial processor. An NVIDIA H100 delivers about 2,000 TFLOPS, five orders of magnitude more. Rad-hard layout rules (enclosed gates, guard rings, DICE cells) do not map cleanly onto FinFET transistors, which respond to radiation differently from planar CMOS. DARPA's Electronics Resurgence Initiative has funded rad-hard FinFET research, but a qualified, secure production line is a decade away. Rad-tolerant design on commercial nodes is the near-term answer.

LEO Constellation Semiconductor Demand

Commercial LEO constellations are the fastest-growing part of the space chip market and the main driver of rad-tolerant demand. SpaceX had launched over 6,000 Starlink satellites by 2025. A Starlink Gen 2 or Gen 3 satellite carries:

• a baseband SoC for phased array beamforming and user link management
• an attitude and orbit control MCU for reaction wheels, thrusters and star trackers
• power management ICs for solar arrays, Li-ion batteries and bus regulation
• Ku-band and Ka-band phased array transmit/receive ICs
• laser driver electronics for optical inter-satellite links
• D3 on-orbit AI compute in Gen 3

Across the constellation, Starlink's chip demand compares with a mid-sized consumer electronics product line, and every part must tolerate LEO radiation.

Blue Origin's TeraWave targets a different market from Starlink and Amazon Leo. It serves about 100,000 enterprise, datacenter and government customers with high-capacity symmetric links, and adds a MEO layer for 6 Tbps optical backbone traffic. Its user links run in Q/V-band, higher than the Ku and Ka bands Starlink uses, which pushes demand toward GaN and SiGe millimeter-wave RFICs.

Golden Dome and Starshield

Golden Dome is the U.S. layered missile defense program, led by Space Force Gen. Michael Guetlein. Most of its new layers sit in LEO, which makes it a major new source of defense demand for space-qualified chips. Starshield is the SpaceX government satellite line, built on the Starlink bus with government payloads and security controls; SpaceX builds the National Reconnaissance Office (NRO) proliferated reconnaissance constellation on it, with Northrop Grumman.

• Space-Based Interceptors (SBI): satellites that destroy missiles in boost phase, before warheads separate. The Space Force awarded prototype agreements to 12 companies: Lockheed Martin, SpaceX, Anduril Industries, Booz Allen Hamilton, General Dynamics, GITAI USA, Northrop Grumman, Quindar, RTX Raytheon, Sci-Tec, True Anomaly and Turion Space. Each must demonstrate an interceptor by 2028.
• Space-Based Air Moving Target Indicator (SB-AMTI): a sensor constellation that tracks aircraft and cruise missiles from orbit. SpaceX holds the initial award, fielding by 2028, from a pool of nine vendors.
• Space Data Network (SDN) Backbone: a proliferated LEO communications network, formerly called MILNET, for the Space Force and NRO. SpaceX holds the prototype award on Starshield satellites. It carries data for Golden Dome and Combined Joint All-Domain Command and Control (CJADC2), and replaces later tranches of the Space Development Agency (SDA) Transport Layer.
• Tracking Layer: SDA's Proliferated Warfighter Space Architecture (PWSA) infrared satellites that detect and track missile launches, including hypersonic glide vehicles. L3Harris builds satellites derived from the Missile Defense Agency (MDA) Hypersonic and Ballistic Tracking Space Sensor (HBTSS).
• Command and control software: Anduril and Palantir are reported as the leading software providers; SpaceX is part of a group building the Golden Dome operating system.
• Ground-based interceptors: Lockheed Martin builds the Next Generation Interceptor (NGI) for MDA.

Golden Dome chip demand falls into these groups:

• infrared focal plane arrays (HgCdTe and InSb detectors on silicon readout ICs) for Tracking Layer and SB-AMTI sensors, from Teledyne, Raytheon and L3Harris
• rad-tolerant processors and FPGAs for on-orbit target processing and interceptor guidance
• optical inter-satellite link lasers, drivers and photodetectors for the SDN Backbone mesh
• NSA Type 1 cryptographic ICs on every satellite and terminal
• GaN RF and power devices for crosslinks, downlinks and interceptor seekers

Most of this volume goes to commercial-node rad-tolerant parts built at constellation rates. The three U.S. rad-hard fabs supply the smaller set of parts that must survive higher orbits or nuclear environments.

Defense Semiconductors Beyond Space

• Radar and electronic warfare: the largest defense chip category by value. AESA radars such as the F-35's APG-81, the Navy's SPY-6 and the Army's LTAMDS each use thousands of GaN-on-SiC T/R modules, which replaced traveling wave tubes. Production sits mainly in prime-contractor fabs, including Raytheon's Andover, Massachusetts GaN fab and Northrop Grumman's internal line, with substrates and devices from Wolfspeed and MACOM.
• Secure communications: NSA Type 1 cryptographic chips encrypt classified traffic in AN/PRC-152 and AN/PRC-163 radios, MUOS and AEHF satellite terminals and nuclear command and control. They are made in small, costly runs at cleared facilities, and their process, transistor count and foundry are not published.
• Vehicle electrification: Army hybrid-electric combat vehicle programs and battery or fuel cell auxiliary power drive demand for military SiC. Inverters must meet MIL-STD-461 (EMI), MIL-STD-810 (environment), -55C to +125C operation and tracked-vehicle shock, which commercial EV SiC parts do not meet without screening or redesign.
• Directed energy: a 100kW solid-state laser needs diode laser arrays at that power, and high-power microwave weapons need kilowatt-class GaN amplifiers. Diamond and gallium oxide (beta-Ga2O3) devices are in research for this role.

Sovereign Defense Chip Programs

Allied governments are funding domestic defense chip supply so that export controls, sanctions or conflict cannot cut it off.

• United States: expansion of the DMEA Trusted Foundry program under the CHIPS Act; SiC and GaN investment through the DARPA WIDE program and Department of Defense manufacturing funds; equipment export controls coordinated with Japan and the Netherlands under the Wassenaar Arrangement.
• European Union: the European Chips Act targets 20% of global chip production by 2030, with space and defense supply security provisions. TSMC Dresden (N28 and N16) serves mature-node automotive and defense demand. Intel's planned Magdeburg fab was meant to run Intel 18A.
• France: government support for STMicroelectronics SiC expansion, justified partly on defense supply grounds.
• United Kingdom: a compound semiconductor strategy built around GaAs, GaN and InP capability at the Compound Semiconductor Applications Catapult in Cardiff, Wales.

Cross-Sector Supply Overlaps

• SiC substrates: Wolfspeed substrates feed 5G GaN amplifiers, EV traction inverters, defense radar T/R modules and military vehicle power. The Wolfspeed restructuring affects all of them, and defense programs cannot switch to Chinese SiC because of ITAR and supply security rules.
• TSMC capacity: D3 competes for the same TSMC wafers and advanced packaging as AI GPUs, ADAS SoCs and smartphone processors. TSMC has not confirmed the node. D3 also brings requirements most TSMC customers do not have: radiation-tolerant design rules, custom screening and supply security controls.
• InP foundries: 6G sub-THz research (DARPA, the EU Hexa-X project, Japan's NICT) and defense radar and EW both need InP HEMTs from the same narrow base of IQE, Raytheon and Northrop Grumman fabs.

Space and Defense Supply Chain Bottlenecks

Key Space and Defense Semiconductor Suppliers

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