WFE Thermal Processing Equipment

Thermal processing equipment is the most fragmented vendor category in wafer fab equipment. Where lithography concentrates at one vendor, etch at one dominant plus two secondary, and CMP at a clear duopoly, thermal processing divides across four major vendors with each holding distinct sub-category strength rather than overall dominance. Tokyo Electron operates the broadest thermal portfolio across furnace and RTP applications. Kokusai Electric (Japan, spun off from Hitachi Kokusai Electric) is the batch furnace specialty leader with high-throughput platforms. ASM International (Netherlands) leads in epitaxial silicon growth and specialty thermal oxidation. Applied Materials dominates rapid thermal processing (RTP) with the Vantage and Centura platform families. Secondary vendors include Veeco Instruments (laser anneal specialty via Ultratech acquisition), Hitachi High-Tech, and NAURA for Chinese domestic production.

This page covers thermal processing through the equipment and vendor lens — tool sub-categories, vendor market positions, tool family taxonomies, and the emerging millisecond anneal (MSA) category that is reshaping thermal processing at advanced nodes.

Three Process Sub-Categories

Thermal processing divides into three structurally distinct sub-categories by thermal cycle duration and purpose. Each sub-category has its own vendor mix, applications, and node trajectory. The three serve different purposes in the fab flow — they are complementary rather than competitive.

The trajectory across node generations is toward shorter thermal cycles. Furnace processing (minutes-to-hours) remains dominant for thermal oxidation and LPCVD where long-duration exposure is the objective, but its share of dopant activation has shrunk. RTP (seconds) replaced furnace anneal for post-implant activation starting around the 0.18 µm generation. Millisecond anneal (MSA) replaced RTP for the most diffusion-sensitive activation steps starting around the 45 nm generation and has grown through every subsequent node. The shortening thermal cycle is driven by the "anneal budget" problem explained below.

The Anneal Budget Problem

Modern transistors depend on extremely sharp dopant junctions — the boundaries between n-type and p-type silicon that form the transistor's electrical structure. A source-drain extension at a FinFET or GAA nanosheet source-drain junction must be sharply defined to a few nanometers, which requires placing dopant atoms at specific positions via ion implantation and then activating them (moving them into substitutional lattice sites where they can contribute carriers) via thermal processing. The activation step is obligatory; implanted dopants sit in interstitial lattice positions until thermal energy moves them into substitutional sites.

The physics problem is that the same thermal energy that activates dopants also causes them to diffuse — to spread out from their implanted positions. At furnace temperatures over minutes of exposure, a sharp implanted profile becomes a smeared gradient hundreds of nanometers wide, which destroys the sharp junctions that modern devices require. The industry response has been to make the thermal cycle progressively shorter — the same peak temperature applied for much less time delivers enough thermal energy for activation but not enough time for significant diffusion. This is the "anneal budget" concept: every thermal cycle carries a diffusion cost, and modern devices require activation with minimum diffusion cost.

RTP enabled sub-second activation that was infeasible at furnace timescales. MSA enabled sub-millisecond activation that RTP could not deliver. The trajectory continues — experimental sub-nanosecond flash anneal and laser melt approaches target future nodes where even MSA may be too slow. Each transition to a shorter thermal cycle creates a new equipment market segment and drives CapEx migration within thermal processing.

Vendor Landscape

The Vendor Fragmentation Pattern

Thermal processing's four-way vendor split is structurally different from other WFE categories. A leading-edge fab typically operates TEL furnaces for some processes, Kokusai Electric furnaces for others, ASM International Eagle XP for epi, Applied Materials RTP across all advanced-node anneal, and Veeco laser anneal for the most demanding MSA applications — all at the same fab. No single vendor provides a complete thermal processing solution the way Applied provides complete CMP or Lam provides complete plasma etch. The fragmentation is a consequence of the three-sub-category structure and the different specialty strengths each vendor has developed.

This fragmentation has one practical consequence: thermal processing customer relationships are less sticky than in more concentrated categories. A fab that decides to switch RTP suppliers can do so without also switching furnace, epi, or MSA suppliers — each sub-category is structurally separable. Applied's RTP dominance is therefore vulnerable to competitive pressure in a way that Applied's deposition position (where customers have integrated platforms and tight software-hardware coupling) is not. Kokusai's batch furnace leadership, similarly, can be contested by TEL without cascading effects across the thermal portfolio.

Epitaxial Growth as Category Boundary

Epitaxial silicon growth sits on the boundary between thermal processing and deposition. The process is thermal (typically 800–1100°C in hydrogen environment) but the purpose is deposition of a high-quality crystalline silicon layer on the wafer surface. Depending on the classification scheme, epi is counted either as thermal or as deposition — this page treats it as primarily thermal because the tool architectures (single-wafer reactor, hot-wall or lamp heating, hydrogen carrier gas) resemble thermal processing equipment more than they resemble CVD or ALD deposition tools.

The major epi platforms are ASM International Eagle XP (leading at TSMC, Samsung, Intel), Applied Materials Centura Epi (strong secondary), and TEL epi systems. Epi is increasingly important at advanced nodes where raised source-drain structures (elevated SiGe or SiC source-drain stressors for FinFET and GAA) are grown rather than implanted. The in-situ doping capability during epi growth — covered on Implant & Doping — reflects epi's cross-category position between thermal, deposition, and doping.

SiC High-Temperature Anneal

SiC power semiconductor fabrication requires post-implant anneal at temperatures above 1700°C — substantially hotter than any silicon processing temperature. The reason is that SiC has much higher thermal stability than silicon, which means dopant activation requires proportionally higher temperature to move implanted ions into substitutional lattice sites. Conventional silicon thermal equipment cannot reach these temperatures; SiC fabs use specialty high-temperature anneal furnaces with specific graphite cap protection to prevent Si evaporation from the SiC surface during the anneal cycle.

Specialty SiC thermal equipment is supplied by companies including Centrotherm Clean Solutions (Germany), ULVAC, and specialty Japanese and European suppliers. The SiC thermal market is smaller in unit terms than silicon thermal but is a distinct supply segment that major WFE vendors do not serve directly. This illustrates how wide-bandgap semiconductor production operates with equipment supply chains partially separate from mainstream silicon WFE. See SiC & GaN for the substrate and device context, and Implant & Doping for Axcelis's SiC-specific implant position.

Lead Times & Installation

Thermal processing tools have lead times comparable to other WFE categories — typically 9–15 months for mainstream platforms. Batch furnace platforms (Kokusai Electric, TEL) often ship faster than more recently developed single-wafer MSA systems because the furnace platforms are mature designs with established supply chains. Installation requires high-purity gas delivery (nitrogen, oxygen, ammonia, hydrogen, specialty dopants for furnace processes), substantial thermal management and cooling infrastructure, and cleanroom-compliant exhaust systems for process gases. Furnace platforms particularly have large facility footprints — a single vertical furnace platform can occupy significant cleanroom floor space for the tool plus gas cabinets plus exhaust systems.

Export Controls

Thermal processing equipment export controls target advanced-node capability. US BIS rules restrict Applied Materials advanced RTP and MSA tools to Chinese leading-edge fab programs; Japan 2023 controls include TEL and Kokusai advanced thermal platforms. Mature-node furnace and RTP equipment remains largely unrestricted and is available to SMIC, Hua Hong, and other Chinese foundries through both Western vendors and NAURA domestic platforms. The practical gap at Chinese advanced fabs is sharpest in MSA — laser anneal capability for advanced-node USJ formation is harder to substitute than furnace oxidation, and domestic Chinese MSA development is meaningfully behind Applied, Veeco, and the Japanese specialty suppliers.

Related Coverage

Parent: Wafer Fab Equipment

Peer WFE categories: Implant & Doping (post-implant anneal partner) · Deposition (epi cross-boundary; LPCVD overlap) · Lithography

Adjacent supply layers: Fab Consumables (process gases, hydrogen, specialty anneal gases)