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Fab Equipment Categories



Every chip on earth is manufactured by equipment built by fewer than twenty companies. Five control the advanced-node front-end market. Two duopolize automated test. A handful dominate each category of advanced packaging equipment. Fab Equipment is the most concentrated layer of the semiconductor supply chain — more concentrated than foundry capacity itself — and the concentration is structural: a function of the physics, capital intensity, and per-fab qualification cycles that define what it takes to build and sell a manufacturing tool.

Semiconductor manufacturing equipment decomposes into three primary categories that correspond to the three phases of the wafer-to-chip transformation.

Category What It Does Leading Vendors
Wafer Fab Equipment (WFE) Front-end processing — lithography, etch, deposition, CMP, metrology, thermal processing, ion implant, cleaning. Transforms a blank wafer into a wafer full of working transistors and interconnects ASML (lithography), Applied Materials, Lam Research, Tokyo Electron (etch and deposition), KLA (metrology and inspection), ASM International (ALD)
Packaging Equipment Back-end and advanced packaging — wafer dicing, die attach, wire bonding, flip-chip bonding, hybrid bonding, encapsulation, substrate production. Transforms tested wafers into packaged, system-ready chips Besi (hybrid bonding, die attach), ASM Pacific Technology (wire bonding, die attach, advanced packaging), Kulicke & Soffa (wire bonding), Applied Materials (hybrid bonding partner to Besi), DISCO (dicing)
Test Equipment Electrical test across wafer sort (pre-singulation) and final test (post-package). Identifies functional die, validates performance at temperature extremes, sorts into performance bins Advantest (memory test, HBM, high-end SoC), Teradyne (logic, RF, mixed-signal), FormFactor / MJC / Technoprobe (probe cards), Cohu and Chroma (handlers)


Top 10 Most Critical Fab Tools

# Tool Type Function Why Critical Leading Vendors
1 Photolithography Transfers circuit patterns onto wafer using photoresist EUV tools are indispensable for <7nm nodes and are globally supply-constrained ASML (EUV, DUV)
2 Etching (Dry Etch) Plasma-etches patterns into films after lithography Enables sub-10nm features and finFET/3D gate geometries LAM, TEL, Applied Materials
3 Deposition (CVD/ALD/PVD) Deposits oxide, nitride, metal, and dielectric layers Forms gate stacks, interconnects, and barrier layers Applied Materials, ASM, TEL, Lam Research
4 Ion Implantation Dopes silicon with boron, arsenic, or phosphorus ions Modifies electrical properties at nanometer scale Axcelis, Applied Materials
5 Metrology & Inspection Measures critical dimensions, overlay, and defects Ensures yield and quality at each production step KLA, Onto, Nova, Hitachi High-Tech
6 Thermal Processing Heats wafers to anneal or oxidize structures Activates dopants and controls crystal structure TEL, Kokusai, ASM, Applied Materials
7 Chemical Mechanical Planarization (CMP) Polishes wafer to ensure layer flatness Enables multi-layer stacking with nanometer precision Ebara, Applied Materials
8 Wet Stations / Cleaners Cleans wafers using acid/solvent processes Minimizes particle contamination and resist residue SCREEN, TEL, SEMES
9 Wafer Handling / EFEM Transfers wafers using robots and FOUPs Enables automation and protects cleanroom yield Brooks, RORZE, Hirata
10 Gas Delivery & Abatement Manages delivery and neutralization of toxic gases Essential for safety, compliance, and GHG mitigation Edwards, Air Liquide, Linde


Cross-Pillar Context

Tool availability determines which fabs can be built (Fab Facilities), which process flows can be executed (Processes & Consumables), and which device types can be manufactured at which nodes (Chip Types). Equipment export controls — ASML EUV restrictions, Japan METI controls, US advanced-node controls to China — operate at this layer because concentration makes policy leverage most durable here.

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