Route
An Arizona Blackwell Die Still Crosses the Pacific to Be Packaged
- Some US volume
- Made abroad
| Component | Supplier | Role | Where | US status |
|---|---|---|---|---|
| Logic die | TSMC | Primary | Fab 18, Tainan, Taiwan | Made abroad |
| Logic die | TSMC Arizona | Second source | Fab 21, Phoenix, USA | Some US volume |
| HBM | SK hynix | Primary | M16, Icheon, South Korea | Made abroad |
| HBM | Micron | Second source | Hiroshima and Taichung, Japan and Taiwan | Made abroad |
| HBM | Samsung | Second source | Pyeongtaek, Pyeongtaek, South Korea | Made abroad |
| Interposer or bridge | TSMC | Sole | CoWoS-L lines, Taiwan | Made abroad |
| Advanced packaging | TSMC | Sole | CoWoS-L lines, Taiwan | Made abroad |
| Package substrate | Ibiden | Primary | Ogaki area, Japan | Made abroad |
| ABF film | Ajinomoto | Sole | Kawasaki area, Japan | Made abroad |
| Final test | KYEC | Primary | Hsinchu and Miaoli, Taiwan | Made abroad |
| Final test | ASE | Second source | Kaohsiung, Taiwan | Made abroad |
| Placeholder: rows from sx_chip_rings; full ring on B300 Supplier Ring | ||||
TSMC began Blackwell wafer production at Fab 21 in Phoenix in October 2025, the first NVIDIA flagship silicon made in the United States. The wafers still return to Taiwan, because CoWoS-L, the packaging that joins the two logic dies to eight HBM stacks on a silicon bridge interposer, runs only at TSMC plants there. Of the 11 supplier rows in the site's B300 ring, the Arizona logic die is the only one with US volume. Every flagship NVIDIA data center GPU since the P100 in 2016 has been packaged on CoWoS in Taiwan.
The ring for the next generation, Rubin, has no row with US volume yet, only a planned KYEC test site in the US: its N3P logic dies come from Taiwan until Fab 21's N3 phase runs.
Chokepoints
Three HBM Suppliers, One Packager
NVIDIA can buy HBM from three memory makers, and since 2026 SK hynix, Samsung and Micron all ship HBM4 for Rubin. It has one source for everything that turns those parts into a GPU: TSMC for the logic die and the CoWoS-L package, Ajinomoto for the build-up film in the substrate. Reported allocations give NVIDIA about 60% of TSMC's CoWoS output in 2026, from capacity estimated at 120,000 to 130,000 wafers a month by the fourth quarter; both figures are industry estimates, not TSMC disclosures.
- CoWoS: the step NVIDIA cannot route around. No other company runs CoWoS-L at volume, and no CoWoS-L line outside Taiwan opens before 2028. See CoWoS.
- HBM: three suppliers, but all three are capacity-constrained and none makes HBM in the US yet. See HBM.
- Substrates: Ibiden is NVIDIA's main AI substrate supplier; its award for Rubin is inferred, not confirmed. See Substrates and Interposers.
Beyond TSMC
Samsung Makes NVIDIA's First Non-TSMC Platform Chip
| Product | Maker | Status | Supply-chain point |
|---|---|---|---|
| Groq 3 LPX inference chip | Samsung Foundry, Korea | Full mass production announced August 2026 | First NVIDIA platform chip of the Blackwell and Rubin era built outside TSMC; came with the Groq technology deal of December 2025 (reported at about $20 billion) |
| HBM4 for Rubin | SK hynix, Samsung, Micron | Shipping in 2026 | Three-way memory sourcing; SK hynix reported as the largest share |
| x86 CPUs and RTX SoCs with Intel | Intel | Co-development after NVIDIA's $5 billion Intel stake (2025) | Gives NVIDIA a path to Intel Foundry and Intel packaging; no NVIDIA wafers at Intel announced |
None of these move the core GPU. Every Blackwell and Rubin data center GPU is a TSMC logic die in a TSMC package, and the next generations on NVIDIA's roadmap, Rubin Ultra and Feynman, are also planned on TSMC nodes.
US build-out
US Packaging Arrives in 2028, Three Years After US Wafers
- Some US volume
- US planned
| Step | Partner and site | Status | US status |
|---|---|---|---|
| Logic wafers | TSMC Fab 21, Phoenix, Arizona | Blackwell wafers since October 2025 | Some US volume |
| CoWoS packaging | Amkor, Peoria, Arizona | Working with NVIDIA and Apple; production targeted early 2028 | US planned |
| CoWoS and 3D-IC packaging | TSMC Arizona packaging plant | Construction begun; TSMC goal is before 2029 | US planned |
| Final test | KYEC US sites | NVIDIA advancing about $1.1 billion; sites not disclosed | US planned |
| Server and rack assembly | Foxconn, Houston; Wistron, Texas | Plants announced April 2025 for 2026 production; volume not disclosed | Some US volume |
| Placeholder: HBM in the US: SK hynix West Lafayette, Indiana packaging plant (planned) | |||
In April 2025 NVIDIA said it would produce up to $500 billion of AI infrastructure in the United States over four years. The plan covers every step except two that have no US date: HBM stacking and substrate making. Until the Arizona packaging lines open in 2028, a US-made NVIDIA GPU means a US wafer packaged in Taiwan. See US Reshoring.
China
NVIDIA Plans on No China Data Center Revenue
China, including Hong Kong, was about 13% of NVIDIA revenue in fiscal 2025, before the April 2025 license requirement on the H20, its China-only data center GPU, which cost NVIDIA a $4.5 billion charge in the first quarter of fiscal 2026. NVIDIA's outlook for the quarter ending October 2026 assumes no data center compute revenue from China at all. The gap is being filled by Huawei's Ascend line, made at SMIC; see Huawei and HiSilicon and China Bifurcation.
Record
Page Record
- Covers
- Where NVIDIA's Blackwell and Rubin GPUs are made, single-source inputs, silicon made outside TSMC, US manufacturing sites and China exposure
- Sources
- NVIDIA second-quarter fiscal 2027 results (August 2026); SemiconductorX B300 and Rubin supplier rings (sx_chip_rings, October 2026); The Register and iConnect007 on Arizona Blackwell wafers (October 2025); Reuters via WHBL on TSMC Arizona packaging (April 22, 2026); Silicon Analysts on CoWoS capacity and allocation (September 2026, estimates); Design & Reuse on Groq 3 LPX at Samsung (August 31, 2026); NVIDIA US manufacturing announcement via National CIO Review (April 15, 2025); FreightWaves on Foxconn Houston (June 2025); Phoenix to Hsinchu distance computed
- Last verified
- October 2026