GPUs: Graphics Processing Units

NVIDIA Blackwell and Rubin · AMD Instinct · Moore Threads and MetaX

NVIDIA booked $89 billion of data center revenue in the quarter ended July 26, 2026. Each of its Rubin GPUs, shipping from the second half of 2026, needs TSMC N3P logic dies, TSMC CoWoS-L packaging and 288GB of HBM4 from SK hynix, Samsung or Micron, and GPU output rises only as fast as the slowest of the three.

Three separate inputs gate every NVIDIA Rubin GPU: TSMC N3P wafers for the logic dies, TSMC CoWoS-L packaging, and eight HBM4 stacks totaling 288GB from SK hynix, Samsung or Micron. GPU output rises only as fast as the slowest of the three. WHAT GATES ONE NVIDIA RUBIN GPU LOGIC DIES TSMC N3P Fab 18, Tainan, Taiwan PACKAGING TSMC CoWoS-L Taiwan; Arizona from 2028 MEMORY 8 HBM4 stacks, 288GB SK hynix, Samsung, Micron NVIDIA RUBIN GPU 2 logic dies 288GB HBM4 22 TB/s, ships 2H 2026 Output rises only as fast as the slowest of the three. NVIDIA DATA CENTER REVENUE $89B QUARTER ENDED JULY 26, 2026; H200 SALES TO CHINA UNDER 1% OF IT
NVIDIA data center
$89B a quarter
Rubin memory
288GB HBM4
Rubin logic
TSMC N3P
AMD MI455X
432GB HBM4
China H200 share
Under 1%
Hub
Chips

The stacked bottleneck

Wafers, CoWoS and HBM Gate Every AI GPU

GPUs became the default AI training chip because their thousands of cores match the matrix math of neural networks, and because NVIDIA built CUDA around them over two decades.

  • Wafers: Blackwell runs on TSMC 4NP and Rubin on TSMC N3P, the same wafer pool AMD, Apple, Qualcomm and the hyperscaler chips draw on.
  • CoWoS: after fabrication, TSMC joins the GPU dies and HBM stacks on a silicon interposer with bridges (CoWoS-L). This capacity is separate from wafer starts and has limited NVIDIA shipments since the Hopper ramp in 2023.
  • HBM: a Rubin GPU carries eight HBM4 stacks, 288GB in all. SK hynix led HBM supply with half of the market in the second quarter of 2026, ahead of Samsung and Micron.

Each input expands on its own multi-year schedule, so relieving one does not relieve the others. Detail is on CoWoS and HBM.

GPU families

GPU Families, Products and Process

GPU families
FamilyProductsProcess and packagingMemory and suppliers
NVIDIA Blackwell (data center)B200 and GB200; B300 Blackwell Ultra; GB300 NVL72 racksTSMC 4NP, two dies per package; CoWoS-L192GB HBM3E (B200), 288GB HBM3E (B300); SK hynix lead, Samsung and Micron
NVIDIA Rubin (data center)Rubin GPU paired with the Vera CPU in Vera Rubin racks; Rubin Ultra follows in 2027TSMC N3P; CoWoS-L288GB HBM4 at 22 TB/s; HBM4 from SK hynix, Samsung and Micron
NVIDIA GeForce RTX 50 (consumer)RTX 5090, 5080 and downTSMC 4NGDDR7 from Micron, Samsung and SK hynix, a separate memory chain from HBM
AMD Instinct (data center)MI355X; MI455X in Helios racks (2026)TSMC N3 (MI355X); TSMC N2 compute dies on N3 base dies with hybrid bonding and CoWoS-L (MI455X)288GB HBM3E (MI355X); 432GB HBM4 (MI455X), Samsung the primary HBM4 supplier
AMD Radeon (consumer)Radeon RX 9070 seriesTSMC N4PGDDR6
Intel data center GPUsGaudi 3; Crescent Island inference GPU announced for 2026 samplingTSMC 5nm (Gaudi 3)HBM2E (Gaudi 3); LPDDR5X (Crescent Island)
China GPUsMoore Threads MTT; MetaX; Biren; Huawei Ascend (see AI Accelerators)SMIC; some earlier designs at TSMC before export controlsMoore Threads and MetaX listed on Shanghai's STAR Market in late 2025

Supply risk

Deployment and Supply Risk

Deployment and supply risk
PlatformWhere it is usedPrimary supply risk
NVIDIA Blackwell and RubinAI training and inference clusters at hyperscalers, neoclouds and labsTSMC wafers, CoWoS-L capacity and HBM, all needed at once; HBM4 qualification
AMD MI355X and MI455XMicrosoft, Oracle, Meta and OpenAI clustersTSMC N2 and N3 shared with AMD EPYC; HBM4 supply; ROCm software maturity
Consumer GPUsGaming, workstations, local AI inferenceLower allocation priority than data center parts; GDDR7 supply
China GPUsDomestic AI clustersSMIC capacity and yield; no EUV; HBM access

CUDA lock-in

CUDA Concentrates Demand on One Architecture

NVIDIA's strongest position is its software: PyTorch, JAX and most AI research code assume CUDA, cuDNN, NCCL and TensorRT. AMD's ROCm now runs the major frameworks, but porting custom kernels and finding engineers who know ROCm still cost time. That switching cost concentrates AI demand on NVIDIA hardware in a way a second chip supplier alone does not undo, which is why the hyperscalers build their own accelerators (see AI Accelerators).

Export controls

Export Controls Split GPU Supply in Two

  • United States: controls since October 2022 bar NVIDIA's and AMD's top data center GPUs from China. The H20, NVIDIA's China-compliant part, needed a license from April 2025. In January 2026 Washington allowed H200 exports under license.
  • China: Beijing first held back H200 purchases while it promoted domestic chips, then let selected companies buy limited quantities. NVIDIA's first H200 shipments came to less than 1% of its $89 billion data center revenue in the quarter ended July 26, 2026.
  • Domestic alternatives: Huawei's Ascend 910C is made at SMIC, though a TechInsights teardown found TSMC-made dies obtained before controls tightened. Cambricon's revenue more than doubled to about $890 million in the first half of 2026, and Moore Threads and MetaX GPUs reached the STAR Market in late 2025.

China's wider position is on the China Bifurcation spotlight and the Huawei and HiSilicon spotlight.

Record

Page Record

Covers
Data center and consumer GPUs, the wafer, packaging and HBM constraints, CUDA, and export controls
Sources
NVIDIA and AMD product disclosures; South China Morning Post on H200 shipments (August 2026); Caixin on H200 licensing (January 2026); TechInsights via Bloomberg on Ascend 910C; Cambricon filing (August 2026); Counterpoint HBM share
Last verified
October 2026