AI Accelerators

Google TPU · AWS Trainium · Microsoft Maia · Tesla AI5 · Huawei Ascend · Cambricon

Google, AWS and Microsoft now ship their own AI chips at the leading edge: TPU Ironwood with 192GB of HBM3E, Trainium3 on 3nm, Maia 200 on TSMC 3nm. Of ten flagship AI and memory chips, TSMC makes the logic for eight, the base die of SK hynix's HBM4, and dies found inside Huawei's SMIC-built Ascend 910C.

Ten flagship chips with supplier rings, and where TSMC sits in each: TSMC makes the logic dies for eight of them, the base die of SK hynix HBM4, and a TechInsights teardown found TSMC-made dies in Huawei's SMIC-built Ascend 910C TEN FLAGSHIP CHIPS, ONE FOUNDRY IN COMMON NVIDIA Blackwell Ultra (B300) TSMC 4NP TSMC MAKES THE LOGIC NVIDIA Rubin TSMC N3P TSMC MAKES THE LOGIC AMD Instinct MI455X TSMC N2 and N3 TSMC MAKES THE LOGIC Google TPU Ironwood TSMC; node not disclosed TSMC MAKES THE LOGIC AWS Trainium3 3nm, reported TSMC TSMC MAKES THE LOGIC Microsoft Maia 200 TSMC 3nm TSMC MAKES THE LOGIC Tesla AI5 TSMC (Arizona) and Samsung (Taylor) TSMC AND SAMSUNG MAKE THE LOGIC Huawei Ascend 910C SMIC 7nm class TSMC DIES IN TEARDOWN SK hynix HBM4 SK hynix 1b DRAM TSMC MAKES THE BASE DIE Apple A19 Pro TSMC N3P TSMC MAKES THE LOGIC SELECT A CHIP FOR ITS SUPPLIER RING.
Chips with rings
10
TSMC in the chain
10 of 10
Broadcom AI revenue
$16.7B, FQ3 2026
Most HBM
MI455X, 432GB
Anthropic TPUs
Up to 1 million
Hub
Chips

Ten flagship chips

Supplier Rings for Ten Flagship Chips

Each supplier ring follows one chip through its logic dies, memory, interposer, substrate, packaging and test, naming the plant and whether it is in the United States.

Flagship AI chips with supplier rings
ChipDesignerLogic dieMemoryPackageRing
NVIDIA Blackwell Ultra (B300)NVIDIATSMC 4NP288GB HBM3ETSMC CoWoS-LSupplier ring
NVIDIA RubinNVIDIATSMC N3P288GB HBM4TSMC CoWoS-LSupplier ring
AMD Instinct MI455XAMDTSMC N2 and N3432GB HBM4CoWoS-L with hybrid bondingSupplier ring
Google TPU IronwoodGoogle with BroadcomTSMC; node not disclosed192GB HBM3EPlaceholderSupplier ring
AWS Trainium3AWS (Annapurna Labs)3nm, reported TSMC144GB HBM3EPlaceholderSupplier ring
Microsoft Maia 200MicrosoftTSMC 3nm216GB HBM3EPlaceholderSupplier ring
Tesla AI5TeslaTSMC (Arizona) and Samsung (Taylor)PlaceholderPlaceholderSupplier ring
Huawei Ascend 910CHiSiliconSMIC 7nm class; TSMC-made dies found in teardownHBM2E, stockpiled Samsung and SK hynixPlaceholderSupplier ring
SK hynix HBM4SK hynixSK hynix 1b DRAM; TSMC 12nm-class base die12-high HBM4 stackSK hynix MR-MUFSupplier ring
Apple A19 ProAppleTSMC N3P12GB LPDDR5XTSMC InFOSupplier ring

The rack-scale rings on DatacentersX stop at the accelerator; these rings open it. All ten are on Chip Supplier Rings. How each accelerator sets the power of its rack, from about 135 kW for a GB300 NVL72 to about 190 to 230 kW for Vera Rubin NVL72 and 225 to 245 kW for AMD Helios, is on the DatacentersX AI Chip Layer page.

Hyperscaler chips

Hyperscalers Build Chips for Their Own Clouds

  • Google: TPU Ironwood, designed with Broadcom, carries 192GB of HBM3E and scales to 9,216 chips per pod. Anthropic plans to use up to a million TPUs.
  • AWS: Trainium3, its first 3nm chip, has 144GB of HBM3E and went into general availability in December 2025 in UltraServers of up to 144 chips.
  • Microsoft: Maia 200, on TSMC 3nm with 216GB of HBM3E, began rolling out in Azure's US Central region in January 2026.
  • Meta: MTIA runs ranking and recommendation inference, designed with Broadcom.
  • Tesla: AI5 is made at both TSMC and Samsung, with vehicle volume reported for 2027.

These chips are not sold on the open market, so their wafers never show up in GPU shipment figures, yet they draw on the same TSMC wafers, CoWoS lines and HBM as NVIDIA and AMD. Broadcom, which designs custom chips for Google, Meta and others, reported $16.7 billion of AI semiconductor revenue in its fiscal third quarter of 2026, up 221% in a year.

Other accelerators

Startups and Chinese Accelerators

Other AI accelerators
FamilyProductsProcessHow it is sold
Meta MTIAMTIA for ranking and recommendation inferenceTSMC 5nm classCaptive, Meta's own data centers; designed with Broadcom
CerebrasWSE-3 wafer-scale engine in CS-3 systemsTSMC 5nm, one chip per 300mm waferSold as systems and cloud service; national labs and inference customers
GroqLPU inference chipsGlobalFoundries 14nm (first generation)Cloud inference service
TenstorrentWormhole and Blackhole, RISC-V and Tensix coresTSMC 12nm (Wormhole), TSMC 6nm (Blackhole)Cards and systems; open-source software
SambaNovaSN40L reconfigurable dataflow unitTSMC 5nmSystems and cloud for government and enterprise
CambriconSiyuan acceleratorsSMIC and other Chinese foundriesChinese cloud and AI companies; revenue about $890 million in the first half of 2026
Huawei Ascend roadmapAscend 950 and later, with Huawei's own HBMSMICHuawei Atlas systems; Huawei reportedly aims to double Ascend output in 2026
Baidu, AlibabaKunlun P800; T-Head acceleratorsChinese foundriesCaptive, own clouds

Bottlenecks

AI Accelerator Bottlenecks

Supply chain bottlenecks
BottleneckAffectsSeverity
TSMC leading-edge wafersEvery hyperscaler accelerator plus NVIDIA and AMD GPUsCritical: one wafer pool for all of them
CoWoS and HBMEvery accelerator with HBMHigh: same packaging and memory as GPUs
Design partnersGoogle, Meta and OpenAI with Broadcom; others with Marvell, Alchip, GUC and MediaTekMedium: a small set of firms can take a hyperscaler chip to tape-out
CUDA switching costMerchant accelerators selling to outside customersHigh for adoption, not for supply
Export controlsHuawei, Cambricon and other Chinese acceleratorsHigh: no TSMC leading edge, limited HBM, no EUV

Record

Dataset Record

Dataset
Chip supplier rings (sx_chip_rings): ten flagship chips
Sources
AWS (December 2025), Microsoft via Guru3D (January 2026), The Register on Ironwood (November 2025), AMD via Digital Citizen, NVIDIA, Apple; TechInsights via Bloomberg on Ascend 910C; Broadcom fiscal Q3 2026 results; Cambricon filing (August 2026)
Last verified
October 2026