What OSATs do
OSATs Assemble, Package and Test Chips Made by Someone Else
Fabless chip companies own no packaging lines and rely on OSATs for all back-end work. Integrated device makers (IDMs) outsource part of their back end to balance capacity or reach packaging they do not run in-house. Foundries run captive advanced packaging for their leading-edge customers and send traditional packaging to OSATs.
| Service | What it covers |
|---|---|
| Assembly | Wafer thinning, dicing, die attach, wire bonding or flip-chip bumping, molding, marking |
| Test | Wafer sort, final test, burn-in, system-level test, AEC-Q100 automotive qualification |
| Advanced packaging | Fan-out, 2.5D on silicon or RDL interposers, chiplet integration, system-in-package |
| Specialty | MEMS cavities, RF modules, SiC and GaN power, optoelectronics, hermetic and rad-hard |
Operators
ASE Leads, Amkor and JCET Follow, and Chinese Firms Fill the Second Tier
Revenue figures are for 2024, from TrendForce. Second-tier and specialty operators are on Specialty OSATs; plant-level detail is on Merchant OSATs.
| OSAT | HQ | 2024 revenue | Position |
|---|---|---|---|
| ASE Technology (with SPIL) | Taiwan | $18.54B | Largest OSAT; fan-out (FOCoS), flip-chip, SiP; CoWoS back-end work through SPIL; plants in Taiwan, China, Malaysia, Korea, Mexico; 2026 capex reported at $10.5B |
| Amkor Technology | United States | $6.32B | Only US-headquartered OSAT in the top 10; automotive leader; plants in Korea, Philippines, Vietnam, Japan, Portugal; Peoria, Arizona campus producing from early 2028 |
| JCET Group (with STATS ChipPAC) | China | $5.00B | Largest Chinese OSAT; XDFOI chiplet packaging; plants in China, Singapore, Korea |
| Tongfu Microelectronics | China | $3.32B | AMD's main packaging partner through its Suzhou and Penang joint ventures |
| Powertech Technology | Taiwan | $2.28B | Memory packaging leader for Micron, SK hynix and Nanya; panel-level fan-out plan from 2027 |
| HT-Tech (Tianshui Huatian) | China | $2.01B | Fastest-growing of the top 10 in 2024 (+26%); lead frame, BGA and fan-out |
| WiseRoad (UTAC) | China | $1.56B | Wise Road Capital's packaging group: UTAC plus former ASE plants in China; automotive and industrial |
| Hana Micron | South Korea | $0.92B | Memory packaging for Samsung and SK hynix; +23.7% in 2024; Vietnam expansion |
| KYEC | Taiwan | $0.91B | Largest test house; first US test site funded by a $1.1B NVIDIA advance, high-volume test from April 2027 |
| ChipMOS | Taiwan | $0.71B | Display driver IC packaging and memory test |
Capacity by region
Taiwan and China Each Hold About 30% of Back-End Capacity
A chip cannot ship without a package. A wafer made at TSMC's Phoenix fab today still flies to Taiwan for CoWoS, because no CoWoS-class line operates in the United States.
| Region | Main operators | Position |
|---|---|---|
| Taiwan | ASE and SPIL, Powertech, KYEC, ChipMOS; TSMC captive CoWoS, InFO and SoIC | About 30% of back-end capacity; all CoWoS today |
| China | JCET, Tongfu, Huatian, WiseRoad | About 30%; mature volume plus a fast advanced-packaging ramp |
| South Korea | Hana Micron, SFA Semicon, Nepes; Samsung and SK hynix captive HBM | Memory and HBM concentration |
| Southeast Asia | Amkor Philippines and Vietnam, ASE and Tongfu Penang, Intel Malaysia, UTAC | Volume packaging; the main diversification destination |
| United States | Intel Rio Rancho (captive); Amkor Peoria (2028); TSMC Arizona packaging (before 2029) | About 3% of capacity (2023 estimate) |
| Japan and Europe | Amkor Japan and Portugal; IDM lines at Infineon, ST, NXP; Japanese specialty houses | Specialty, automotive and materials |
Tiers
Leading-Edge Packaging Moved In-House; OSATs Hold the Middle and the Volume
Packaging tiers, from the AI accelerator down to commodity parts.
Ten years ago nearly all packaging was outsourced. Leading-edge packaging is now captive because it is tied to the front end: TSMC makes the CoWoS interposer in the same company that makes the logic die, HBM4 and SoIC stacks are hybrid-bonded on wafers that stay under foundry process control, and thermal design is worked out jointly. ASE, Amkor and JCET are adding 2.5D and fan-out capacity to move up; the middle tier is squeezed from both sides. Architecture detail is on Advanced Packaging.
US capacity
US Packaging Capacity Arrives From 2027
- Made in US
- US planned
| Site | Operator | Role | Status |
|---|---|---|---|
| Rio Rancho, New Mexico (Fab 9) | Intel | Foveros and EMIB, captive | Producing |
| Peoria, Arizona | Amkor | Merchant advanced packaging, CoWoS-class, 10-year TSMC agreement | Production from early 2028 |
| Phoenix, Arizona | TSMC | Captive CoWoS and SoIC | Planned before 2029 |
| West Lafayette, Indiana | SK hynix | HBM stacking | HBM output 2H 2029 |
| United States (site per KYEC) | KYEC | Test for NVIDIA | High-volume test April 2027 |
The CHIPS Act funded Amkor's Peoria campus and the National Advanced Packaging Manufacturing Program. Tesla's planned Terafab in Grimes County, Texas, would add captive packaging next to its own fabs; see Tesla Terafab. Facility-level US status for every plant is on Packaging and Test Facilities.
Record
Page Record
- Covers
- OSAT services, top 10 operators, regional capacity, packaging tiers, US packaging sites
- Sources
- TrendForce top 10 OSAT ranking (May 2025); TrendForce on Amkor and TSMC (June 2026); Bloomberg (2023) for US capacity share; company filings
- Last verified
- October 2026