Doping and Ion Implantation

Dopants

A Few Elements Set Every Transistor's Behavior

Doping places boron, phosphorus and arsenic atoms in chosen regions of the silicon to set how each region conducts.

Pure silicon conducts poorly. Replacing a few silicon atoms per million with boron, phosphorus or arsenic sets the conductivity of each region to the level the circuit needs, and the source, drain, wells and threshold of every transistor are defined by where those atoms land.

Methods

Ion Implantation Replaced Diffusion for Patterned Doping

Ion implantation took over from diffusion in the 1970s because it decouples the two things a designer cares about: energy sets depth, and dose sets concentration. Both are measured electrically during the implant, so the result can be repeated wafer after wafer. Wafer-level doping from crystal growth and epitaxy is covered on Crystal Growing and Epi, SOI and Float Zone.

Ion implantation

Energy Sets Depth and Dose Sets Concentration

High-energy demand has grown fastest. CMOS image sensors need deep photodiode implants to collect light, and power devices need deep, heavily doped regions; both pushed Axcelis to build tools well above 10 MeV. Memory makers also use high-energy implants for isolation in DRAM and 3D NAND.

Where dopants go

Implants Cluster in the Transistor Tier

A logic wafer goes through 20 to 40 implant steps, almost all of them in the transistor tier before the first metal layer. Each needs its own lithography mask to block the regions that must not be doped, so implant is one of the main reasons for the noncritical mask layers in a process. Most of those masks are printed on older deep-ultraviolet (DUV) scanners; see Photolithography.

Implanter vendors

Two Massachusetts Factories Supply Most Implanters

Ion implantation is the one front-end tool class still built mostly in the United States. Applied Materials, through the Varian Semiconductor business it bought in 2011, is the largest supplier and covers every class. Axcelis is the independent specialist, strongest in high energy and silicon carbide. Their factories in Gloucester and Beverly, Massachusetts, sit about 15 miles apart.

• Made in US
• US planned
• Made abroad

Axcelis reported $199 million of revenue in the first quarter of 2026, nearly three quarters of it from Asia. In October 2026 it broke ground on a $35 million plant in Pyeongtaek, South Korea, near Samsung's largest fab campus, with production planned for the second half of 2028. Its all-stock merger with Veeco Instruments, approved by both companies' shareholders in February 2026, still awaits clearance from China's State Administration for Market Regulation (SAMR), the last approval outstanding. Tool families are on Implant and Doping Equipment.

Annealing

Every Implant Needs an Anneal

An implant leaves dopant atoms in the wrong places in the crystal and damages the lattice along each ion's path. Annealing repairs the damage and moves the dopants onto lattice sites, where they conduct. The trade-off is diffusion: the same heat that activates dopants also spreads them. As junctions shrank to a few nanometers, anneals moved from hours in a furnace to milliseconds under a flash lamp or laser.

Anneal tools come from Applied Materials (Vantage RTP and laser anneal), Mattson Technology (millisecond flash anneal; owned by Beijing E-Town Dragon), SCREEN (flash lamp anneal), Veeco (laser anneal) and Kokusai Electric (batch furnaces). Several share platforms with oxidation.

Advanced nodes

3D Transistors Moved Doping Into Epitaxy and Plasma

• Shallower junctions: extensions in leading-edge logic are a few nanometers deep, which takes sub-keV implants, germanium or carbon pre-amorphization, and millisecond or laser anneals.
• 3D surfaces: a beam arrives from one direction, but fins and stacked nanosheets need doping on every face. That moved much of the source and drain doping into in-situ doped epitaxy and plasma doping.
• Isolation in gate-all-around: TSMC N2, Intel 18A and Samsung SF2 nanosheet transistors need implants under the stack to keep the substrate from conducting, plus doping steps tied to backside power delivery at Intel 18A and TSMC A16.
• Memory: DRAM and 3D NAND use many high-energy and high-dose implants, so memory capex swings move implanter orders more than logic does.

SiC doping

Silicon Carbide Can Only Be Doped by Hot Implants

Silicon carbide does not let dopants diffuse at any practical temperature, so every doped region in a SiC power MOSFET must be implanted. Implants run with the wafer heated to 500 °C or more to limit lattice damage, using aluminum for p-type and nitrogen or phosphorus for n-type regions. Activation then needs an anneal above 1,600 °C with a carbon cap to keep the surface from breaking down.

Axcelis built its Purion power series around this market, and the 2023 to 2024 SiC fab buildout drove much of its growth. High-temperature anneal furnaces come from Centrotherm and others. Device context is on SiC and GaN Power Modules.

China

China Is Building Implanters but Still Imports Most

Implanters are one of the last front-end tools China can make only in part. Kingstone Semiconductor, Hwatsing Technology, NAURA, CETC and Shuoke Zhongketai now ship 300mm high-current and medium-current tools aimed at 28nm and coarser processes. In January 2026 the China Institute of Atomic Energy unveiled the POWER-750H, the first domestic tandem high-energy hydrogen implanter, built for IGBT power devices.

Imports still dominate. US-made tools were about 40% of the ion implanters China imported by unit in the first four months of 2026, with Japan and Singapore most of the rest. The pending Axcelis-Veeco merger needs China's SAMR approval for the same reason: Chinese fabs are among both companies' largest customers.

Related coverage

Related Coverage

• Front-End Fabrication
• Implant and Doping Equipment
• Oxidation
• Thin-Film Deposition
• Crystal Growing
• SiC and GaN Power Modules
• Process Gases