Structure
Logic and HBM on a Silicon Interposer
I-Cube follows the same three-layer pattern as CoWoS-S: a logic die and HBM stacks on a silicon interposer, on an organic flip-chip ball grid array (FCBGA) substrate. Micro-bumps join the dies to the interposer, through-silicon vias carry signals down to the substrate, and solder balls connect the substrate to the board.
| Layer | Role | Made by |
|---|---|---|
| Logic die and HBM stacks | Compute plus two to eight or more HBM stacks beside it | Logic at Samsung Foundry; HBM from Samsung Memory or bought outside |
| Silicon interposer | Dense die-to-die wiring and through-silicon vias down to the substrate | Samsung advanced packaging plants in South Korea |
| Organic substrate | Power delivery and board connection | Samsung Electro-Mechanics, Ibiden, Unimicron, AT&S |
Assembly runs chip on wafer first, then thinning, dicing and mounting on the substrate, the same order as CoWoS. See CoWoS for the step-by-step flow.
Variants
Named for HBM Count and Interposer Type
| Variant | What it means | Peer |
|---|---|---|
| I-Cube2, I-Cube4, I-Cube8 | Two, four or eight HBM stacks beside the logic die | CoWoS module sizes |
| I-Cube S | Full silicon interposer | CoWoS-S |
| I-Cube E | Silicon bridges embedded in a redistribution layer, for lower cost | CoWoS-L, Intel EMIB |
The number gives the HBM count, which sets memory bandwidth and capacity. The letter gives the interposer type, following the same move from full silicon toward bridges that TSMC made from CoWoS-S to CoWoS-L.
One-stop supply
Foundry, Memory and Package From One Company
Samsung is the only company that runs a leading-edge foundry, makes HBM and assembles 2.5D modules. An I-Cube customer can buy the logic wafer, the memory and the package from one supplier.
- Qualification: the HBM interface, the memory and the package are tuned inside one company instead of across three.
- Allocation: a TSMC customer must also win HBM allocation from SK hynix, Samsung or Micron; an I-Cube customer negotiates once.
- Roadmaps: HBM4, whose base die Samsung makes on its own 4nm foundry process, and the package can be planned together.
The weakness is the logic side. Most AI chip designers build on TSMC, and moving a design to Samsung Foundry to get the one-stop package means requalifying the whole chip. Samsung's 3D stacking sibling is SAINT.
Customers
Two Named Customers So Far
| Customer | Chip | Announced |
|---|---|---|
| Baidu | Kunlun AI processor on Samsung 14nm with I-Cube | December 2020 |
| Preferred Networks (Japan) | AI accelerator on Samsung 2nm with I-Cube S, as a turnkey foundry, memory and packaging deal | July 2024 |
Neither is a volume AI accelerator on the scale of the NVIDIA, AMD, Google and AWS chips that fill CoWoS. Samsung also packages its own HBM, covered on IDM Captive Packaging.
I-Cube and CoWoS
Same Structure, Different Scale
| Samsung I-Cube | TSMC CoWoS | |
|---|---|---|
| Interposer types | Full silicon (S) and embedded bridge (E) | Silicon (S), organic RDL (R) and bridged (L) |
| HBM | Samsung in-house, or bought outside | Bought from SK hynix, Samsung or Micron |
| Volume customers | Baidu, Preferred Networks | NVIDIA, AMD, Broadcom for Google, AWS, Microsoft |
| Capacity | Not disclosed | About 130,000 wafers a month at the end of 2026 |
| Sites | South Korea | Taiwan, with Arizona before 2029 |
Record
Page Record
- Covers
- I-Cube structure, variants, one-stop supply, customers and comparison with CoWoS
- Sources
- Samsung newsroom (Preferred Networks turnkey deal, July 2024; Baidu Kunlun, December 2020); TrendForce (CoWoS capacity, September 2026); Samsung Foundry Forum materials
- Last verified
- October 2026