SemiconductorX > Fab & Assembly > Process Control
Fab Process Control
Process control is the data, analytics, and feedback layer that keeps a semiconductor fab running within specification. Every process step — lithography exposure, etch rate, deposition thickness, CMP endpoint, ion implant dose — has a target specification and a tolerance band. Process control detects when a tool starts drifting toward the edge of its tolerance, adjusts the recipe to bring it back, and escalates if the drift cannot be corrected. It also aggregates metrology and inspection data across the fab to identify systematic yield issues, trace them back to specific tools or process steps, and drive engineering response.
Process control is not a manufacturing step — it does not act on wafers directly. It is the software and systems layer that runs across every step, collecting data from every tool and feeding back adjustments in real time. Its importance has grown with node advancement: at mature nodes, process control is quality assurance; at 3 nm and below, process control is what makes the node manufacturable at all. Yield ramp at a new leading-edge node can take 12 to 24 months, during which process control analytics — not transistor design, not lithography — is the rate-limiting activity.
The vendor landscape is split between software specialists (PDF Solutions, Synopsys, Siemens EDA) and hardware vendors who bundle process-control software with their tools (KLA, Applied Materials). AI and machine learning have become central to modern process control — see AI in Fabs for the broader methodology view.
Core Elements
Process control integrates several distinct activities into a coherent system. Each has its own methods, tools, and vendors, but they operate as a single loop: measure, analyze, adjust, verify.
| Element | Function | Typical Output |
|---|---|---|
| Statistical Process Control (SPC) | Track every measured parameter against control limits; flag excursions | Control charts, alarms, excursion tickets |
| Advanced Process Control (APC) | Automated feedback and feed-forward adjustments to tool recipes based on measurement data | Recipe adjustments applied in real time; reduces wafer-to-wafer and run-to-run variation |
| Fault Detection & Classification (FDC) | Monitor tool sensor data in real time to detect faults during processing | Tool shutdown before a bad wafer is produced; fault classification and alerting |
| Defect analysis & classification | Categorize defects found by inspection, correlate to specific tools and process steps | Defect Pareto charts, root-cause tracing, yield loss attribution |
| Yield Management Software (YMS) | Aggregate fab-wide inspection, metrology, parametric test, and final yield data | Yield analytics dashboards, trend detection, predictive yield models |
| Virtual metrology | Use sensor data from production tools to predict wafer-level measurements without dedicated metrology | Per-wafer predicted measurements at no metrology throughput cost |
| Overall Equipment Effectiveness (OEE) | Track tool availability, performance, and quality to identify underperforming equipment | Tool productivity metrics; maintenance scheduling inputs |
APC and the Feedback Loop
Advanced Process Control is the part of process control that closes the loop. Where SPC only detects problems, APC acts on them — automatically adjusting tool recipes based on measurement data without human intervention. A lithography overlay measurement that shows alignment drift triggers an APC model to adjust the next wafer's exposure parameters to compensate. A CMP endpoint that ran slightly long triggers a recipe adjustment on the next wafer to prevent dishing. Feed-forward variants use measurements from an upstream step to preemptively adjust a downstream tool — if incoming film thickness measured after deposition is 2% thicker than target, the etch recipe can be tuned to compensate before the wafer arrives at the etch tool.
APC is mature at most advanced fabs and is one of the main reasons modern fab yields are as high as they are. The limits on APC effectiveness come from the quality of the underlying model (APC can only correct for errors it has been trained to recognize) and from measurement latency (if the measurement takes longer than the next process step, feedback cannot close). Virtual metrology — predicting measurements from tool sensor data — addresses the latency problem at the cost of model accuracy. This is one of the more active areas of AI/ML application in the fab.
Defect Classification and Root-Cause Tracing
When an inspection tool finds a defect, the immediate question is not only "what is this defect" but "where did it come from." A particle on the wafer surface could have been deposited during any one of dozens of preceding process steps, transferred from a tool, shed from a chamber component, introduced by wafer handling, or settled from the fab air. Defect classification uses image analysis (increasingly ML-based) to categorize defects by type — particle, scratch, pattern bridging, void, missing feature. Root-cause tracing then correlates defect signatures across the wafer lot history to isolate which tool and step introduced the defect.
This analysis is where yield management software earns its role. A YMS platform ingests inspection results, tool process logs, maintenance records, and parametric test data, and applies correlation analysis to identify systematic patterns — for example, every wafer processed on a specific etch chamber between shift changes has a particle cluster in the upper-left quadrant, pointing toward a worn chamber component. Modern fabs process terabytes of this data per day; extracting actionable yield-improvement insight from that volume requires industrial-grade data infrastructure and increasingly ML-driven analytics.
Vendors
The process control vendor landscape splits between software specialists and hardware-integrated platforms. The split is blurry — KLA bundles extensive software with its hardware, and PDF Solutions works closely with multiple tool vendors — but the primary business models differ.
| Vendor | HQ | Primary Position |
|---|---|---|
| PDF Solutions | United States | Yield management software, characterization vehicles, manufacturing analytics; deep partnerships with foundries |
| KLA | United States | Process control and yield management software tightly integrated with KLA inspection and metrology hardware; dominant in defect analytics |
| Synopsys | United States | Design-for-manufacturing, computational lithography, yield modeling through acquired Ansys and Silicon Frontline technologies |
| Siemens EDA (formerly Mentor Graphics) | United States / Germany | EDA-integrated process control, OPC, and yield analytics platforms |
| Applied Materials | United States | APC and FDC capabilities bundled with Applied process tools; SmartFactory platform |
| Inficon | Switzerland | FDC, endpoint detection, and residual gas analysis for process monitoring |
| Rudolph / Onto Innovation | United States | Lithography-specific process control and analytics; OCD-based APC |
Key Fab Metrics
Process control effectiveness is measured by a small set of metrics that connect directly to fab economics. These metrics are tracked in every advanced fab, reported to management daily, and used to drive engineering priorities.
| Metric | Definition | Significance |
|---|---|---|
| Defect Density (D₀) | Defects per square centimeter of wafer area | Primary input to yield models; target ≤0.1 defects/cm² at advanced nodes |
| Overlay Accuracy | Alignment precision between successive lithography layers, in nanometers | Gates multi-patterning feasibility; EUV-era targets are sub-nanometer |
| Critical Dimension Uniformity (CDU) | Variation in feature dimensions across wafer, across lot, across chamber | Drives transistor parameter spread; determines how tightly speed bins can be defined |
| Wafer Acceptance Rate | Percentage of wafers that meet all incoming and in-line specifications | Measures process stability; below-target acceptance signals systematic issues |
| Ramp-to-Yield Time | Months from initial node silicon to stable commercial yield | Key competitive metric; TSMC's ramp-to-yield discipline is a core strategic advantage |
| Tool Uptime | Percentage of time each tool is available for production | Directly affects fab capacity; EUV uptime above 90% is a key operational goal |
AI and Machine Learning
Process control is the single largest application area for AI and machine learning inside the fab. ML-based defect classification replaces rule-based image processing with trained neural networks that achieve substantially higher classification accuracy. ML-based virtual metrology predicts wafer measurements from tool sensor data, eliminating throughput bottlenecks from physical measurement. ML-based predictive maintenance uses tool telemetry to forecast component failures before they happen. ML-based yield prediction identifies which wafer lots are likely to yield poorly, allowing engineering intervention before the wafers reach sort.
The scale of fab data — hundreds of tools each emitting thousands of sensor channels at sub-second sampling rates, combined with terabytes of inspection imagery per day — makes fab process control one of the most demanding industrial ML environments. TSMC, Samsung, and Intel all run internal ML teams dedicated to fab applications; specialty vendors (notably D2S, PDF Solutions, Synopsys, and smaller players) supply ML-based analytics platforms. Broader coverage is in AI in Fabs.
Related Coverage
Parent: Fab & Assembly Hub
Upstream dependency: Metrology & Inspection (the measurements that feed process control)
Related methods & systems: AI in Fabs
Software integrates with: WFE Hub · EDA