SemiconductorX > Chip Types > Compute & Logic > FPGAs
FGPAs
Field-Programmable Gate Arrays are semiconductor devices whose logic function is defined by post-manufacturing configuration rather than fixed at tape-out. A single FPGA device can be programmed to implement a neural network accelerator today and a packet processing pipeline tomorrow. This reconfigurability comes at a cost in power efficiency and area compared to a custom ASIC — but it eliminates the multi-million dollar NRE of ASIC tape-out and compresses time-to-market from years to weeks. FPGAs occupy the space between the full flexibility of a CPU and the maximum efficiency of a custom ASIC, making them the preferred platform for workloads where volume is too low to justify ASIC NRE, or where the function itself must be updateable after deployment.
The FPGA market is a two-company oligopoly at the high end: AMD (which acquired Xilinx in 2022) and Intel (whose Programmable Solutions Group was majority sold to Apollo Global in 2023 and is operating as an independent subsidiary) control the high-performance FPGA market. Lattice Semiconductor dominates the low-power FPGA tier for edge and industrial applications. Microchip (Microsemi) owns the radiation-tolerant FPGA niche for aerospace and defense. The Intel PSG sale to Apollo and its subsequent trajectory is the most significant structural change in the FPGA market in a decade.
FPGA Families — Products & Process
| Family / vendor | Flagship products | Process node | Supplier & market position |
|---|---|---|---|
| AMD Xilinx Versal ACAP | Versal Premium (HBM2E, highest performance); Versal AI Core (AI Engines for ML inference); Versal HBM (high-bandwidth 5G/networking); Versal Edge (embedded AI applications) | TSMC N7 (Versal family); integrates FPGA fabric + ARM Cortex-A72 CPUs + AI Engine array (VLIW SIMD vector processors) on single die | AMD (Xilinx acquisition 2022, $49B); TSMC foundry; market leader in high-performance FPGA; Vivado/Vitis toolchain; Adaptive Compute Acceleration Platform (ACAP) branding |
| AMD Xilinx UltraScale+ | Virtex UltraScale+ (highest logic density); Kintex UltraScale+ (mid-range); Zynq UltraScale+ MPSoC (FPGA + ARM SoC); Alveo U250/U280 (datacenter accelerator cards) | TSMC N16/N20; predecessor to Versal; still in production and broadly deployed in 5G base stations and datacenter SmartNIC cards | AMD; TSMC; widely deployed in 5G infrastructure (Ericsson, Nokia, Samsung base stations); Alveo cards used for datacenter inference offload |
| Intel Agilex (PSG) | Agilex 9 (highest performance, HBM2e); Agilex 7 (mid-high, I-Series with HBM, F-Series without); Agilex 5 (mid-range embedded); Agilex 3 (entry-level) | Intel 10nm SuperFin / Intel 7 (Agilex 7/9); TSMC N5 targeted for future Agilex generations post-PSG separation; Intel EMIB for HBM integration on Agilex 9 | Intel PSG (majority sold to Apollo 2023, operating as independent subsidiary); Intel foundry for current gen; Quartus Prime toolchain; strong in datacenter, telecom, and defense |
| Intel Stratix 10 | Stratix 10 GX/SX/TX/MX (HBM2); widely deployed in 5G ORAN, radar, and defense signal processing | Intel 14nm; production and support continuing; predecessor to Agilex; large installed base in defense programs with long qualification cycles | Intel PSG; Intel 14nm fab; defense programs often remain on Stratix 10 for 10–15 year product lifetimes; long-term supply commitment required by defense customers |
| Lattice CrossLink-NX / CertusPro-NX | CrossLink-NX (video bridging and sensor aggregation for ADAS/robot vision); CertusPro-NX (general-purpose low-power); Nexus platform (28nm FD-SOI) | 28nm FD-SOI (GlobalFoundries); low-power focus — CrossLink-NX targets sub-1W operation for always-on sensor aggregation | Lattice Semiconductor; GlobalFoundries foundry; market leader in low-power small FPGA; Lattice Propel/Radiant toolchain; strong in automotive sensor aggregation and industrial IoT |
| Microchip RT PolarFire / ProASIC | RT PolarFire (radiation-tolerant, space-grade); PolarFire SoC (RISC-V + FPGA fabric); ProASIC3 (legacy space/defense); RTAX (rad-hard, mature programs) | 28nm (PolarFire, PolarFire SoC); mature node for ProASIC3/RTAX; radiation-tolerant design techniques (triple-redundancy voting, SEU mitigation) rather than rad-hard process | Microchip Technology (Microsemi acquisition 2018); dominant in space and satellite FPGA; RT PolarFire in LEO constellation programs; PolarFire SoC gaining in smart energy and industrial |
| QuickLogic EOS S3 / ArcticPro | EOS S3 (ultra-low-power sensor hub FPGA, sub-mW); ArcticPro (eFPGA IP for SoC integration); QuickLogic Aurora (eFPGA + MCU) | 22nm FFL (TSMC); ultra-low-power focus for IoT always-on sensor processing; eFPGA (embedded FPGA) IP licensing model | QuickLogic; TSMC foundry; niche in ultra-low-power wearable and IoT FPGA; eFPGA IP licensing to SoC designers as alternative to discrete FPGA |
Deployment & Supply Chain Risk
| Family | Focus sector deployment | Primary supply chain risk |
|---|---|---|
| AMD Versal / UltraScale+ | 5G Massive MIMO base station baseband (UltraScale+); datacenter SmartNIC and inference offload (Alveo); ADAS sensor fusion acceleration; radar signal processing | TSMC N7/N16 shared with other AMD products; 5G base station deployment tied to infrastructure spending cycles; Alveo faces GPU/ASIC competition for inference workloads |
| Intel Agilex / Stratix 10 | Datacenter acceleration (Agilex 7/9); ORAN 5G (Agilex); defense and aerospace signal processing (Stratix 10, Agilex); high-speed networking | Intel PSG strategic uncertainty post-Apollo sale; Intel foundry transition for future Agilex nodes; defense programs on Stratix 10 face long-tail supply commitment requirements |
| Lattice CrossLink-NX | ADAS camera and sensor aggregation (sub-1W, always-on); robot vision preprocessing; industrial IoT sensor hub; smart infrastructure edge sensing | GlobalFoundries 28nm FD-SOI capacity; automotive AEC-Q100 qualification lock-in for ADAS designs; concentrated at GF — no TSMC equivalent for 28nm FD-SOI low-power |
| Microchip RT PolarFire | LEO satellite constellation compute (SpaceX Starlink suppliers, Planet Labs, etc.); NASA and ESA space programs; military avionics; smart energy substation automation (PolarFire SoC) | Space-grade qualification lead times (MIL-PRF-38535); radiation testing capacity; RTAX legacy programs create long-tail supply obligations; Microchip single-source for many rad-tolerant FPGA programs |
Intel PSG — The Structural Inflection
Intel's sale of a majority stake in its Programmable Solutions Group to Apollo Global Management in 2023 is the most consequential FPGA market structure event in a decade. PSG (formerly Altera, acquired by Intel in 2015) operates as an independent subsidiary, retaining the Agilex roadmap and Quartus toolchain but no longer fully integrated into Intel's IDM strategy. The strategic question for FPGA customers — particularly defense and telecom customers with long design-in cycles — is whether an Apollo-backed independent PSG will maintain the capital commitment to advance the Agilex roadmap through the next two or three process node transitions.
Defense customers in particular face a dilemma: Stratix 10 is on Intel 14nm and is the current FPGA for many radar, EW, and signals intelligence programs. Agilex is the intended successor. If PSG's roadmap continuity becomes uncertain, defense primes must choose between staying on Stratix 10 indefinitely (a mature but aging node) or migrating to AMD Versal — which requires a full design and qualification effort. The qualification lock-in that makes FPGA supply chains sticky is the same dynamic that makes any PSG strategic uncertainty a significant customer concern.
Supply Chain Bottlenecks
| Bottleneck | Affects | Severity |
|---|---|---|
| Intel PSG strategic uncertainty post-Apollo sale | Agilex roadmap continuity; defense and telecom design-in decisions for next-generation FPGA | Medium-High — long-cycle customers (defense, telecom) need 10+ year supply and roadmap certainty; Apollo ownership introduces investment horizon uncertainty |
| TSMC N7 allocation (AMD Versal) shared with GPU | High-end Versal supply during peak AI GPU demand surges | Medium — FPGA volumes smaller than GPU; manageable but not immune to allocation pressure |
| ABF substrate and interposer lead times (HBM-equipped FPGAs) | Versal Premium (HBM2e) and Agilex 9 (HBM2e) — high-end FPGA with HBM integration | Medium — shared substrate constraint with AI GPU and CPU chiplet packaging |
| GlobalFoundries 28nm FD-SOI for Lattice | CrossLink-NX and low-power Lattice FPGA supply; automotive ADAS sensor aggregation designs | Medium — GF 28nm FD-SOI has no direct equivalent at TSMC; AEC-Q100 qualification lock-in for automotive designs adds switching barrier |
| Defense qualification lock-in and long-tail supply | Stratix 10 and RTAX programs requiring 15–20 year device availability commitments | Structural — defense programs cannot change FPGA vendor without full re-qualification; last-time-buy and die banking strategies required |
Related Coverage
Compute & Logic Hub | CPUs | AI Accelerators | ASICs | RF & Networking | PDK & Foundry Ecosystem | Semiconductor Bottleneck Atlas
Cross-Network — ElectronsX Demand Side
Lattice CrossLink-NX is deployed in automotive ADAS camera and sensor aggregation systems — a direct supply chain dependency for every ADAS-equipped vehicle. Microchip RT PolarFire is in LEO satellite constellations providing connectivity for smart infrastructure and AV mapping data pipelines. 5G base station FPGA demand (AMD UltraScale+, Intel Agilex) scales with network densification required for V2X automotive connectivity and smart grid communication.
EX: ADAS/AV Compute Architecture | EX: EV Semiconductor Dependencies