Semiconductor Wafer Deliverables
Semiconductor manufacturing begins with wafers supplied by upstream vendors. These wafers vary in diameter, thickness, substrate type, and surface preparation. They are shipped to fabs in sealed, automated containers to prevent contamination. The choice of wafer directly impacts fab tooling, process flow, and device performance.
Wafer Diameters & Formats
| Diameter | Typical Use | Status |
|---|---|---|
| 100 mm (4") | Legacy R&D, MEMS, compound semis | Still used in specialty fabs |
| 150 mm (6") | Analog, power devices, MEMS | Widely used for SiC/GaN power devices |
| 200 mm (8") | Mixed-signal, analog, power, MEMS | Mainstream, strong demand for IoT/automotive |
| 300 mm (12") | Leading-edge digital logic & memory | Industry standard for advanced fabs |
| 450 mm (18") | Proposed for cost scaling | Pilot efforts only; industry adoption stalled |
Wafer Variants
- Bare Silicon: Standard polished wafers used as universal starting point.
- Epitaxial (Epi) Wafers: Single-crystal silicon layer grown on substrate for improved device performance.
- Silicon-on-Insulator (SOI): Thin silicon film over buried oxide (BOX) layer, used in RF, low-power, and FinFET devices.
- Compound Wafers: GaAs, InP, GaN, or SiC wafers for optoelectronics and high-power devices.
- Specialty Substrates: Strained silicon, Ge-on-Si, engineered substrates for mobility and bandgap tuning.
Surface Preparation
- Polished (Prime) Wafers: Mirror finish, defect-free surface for advanced lithography.
- Test/Monitor Wafers: Lower-grade wafers for equipment calibration or process monitoring.
- Notch/Flat: Orientation marks for crystal alignment and handling automation.
- Pre-Coated Wafers: Occasionally supplied with hardmask or epitaxial films, depending on customer flow.
Shipping & Handling
- FOUP (Front Opening Unified Pod): Sealed carriers for 300 mm wafers; integrated with fab automation (AMHS overhead transport).
- SMIF Pods: Mini-environments for 200 mm and smaller wafers.
- Batch Sizes: Typically 25 wafers per FOUP/pod; robotic handling minimizes exposure.
Impact on Manufacturing Flow
- Epi Wafers: Skip epitaxy deposition step in fab; provide higher mobility channels.
- SOI Wafers: Device isolation simplified, BOX reduces parasitic capacitance.
- Compound Wafers: Different oxidation/etch chemistries required; often processed in dedicated fabs.
- Polished vs Test Wafers: Test wafers used for process tuning before running prime wafers.
Representative Wafer Suppliers
- Shin-Etsu Handotai (SEH): World’s largest silicon wafer supplier; major producer of 300 mm wafers.
- SUMCO (Japan): Leading supplier of 300 mm silicon wafers, critical for advanced fabs.
- Siltronic (Germany): Provides polished, epi, and SOI wafers to global customers.
- GlobalWafers (Taiwan): Broad portfolio including 200 mm and 300 mm; growing footprint in the U.S. (Texas).
- Wolfspeed (U.S.): Leader in 150 mm and 200 mm SiC wafers for power electronics and EVs.
- II-VI / Coherent: Compound substrates including GaAs, InP, and engineered photonics wafers.
- Soitec (France): Specializes in SOI wafers and engineered substrates.
Market Outlook
300 mm wafers dominate advanced logic and memory fabs, while 200 mm fabs remain critical for analog, mixed-signal, and power semiconductors. Compound wafer demand is rising rapidly due to EVs, 5G, and renewable energy. Wafer suppliers like SUMCO, Shin-Etsu, Siltronic, GlobalWafers, and Wolfspeed are scaling production to meet strategic demand.