Packaging & Test Facilities

Packaging and test facilities are the back-end of semiconductor manufacturing — where wafers from a fab become individual packaged chips ready to ship to customers. These are distinct facilities from wafer fabs, operated by distinct companies, with different equipment, different economics, and different industrial character. A wafer fab produces patterned wafers that hold hundreds to thousands of individual dies; packaging facilities dice those wafers, attach the dies to substrates, wire or bump them to external contacts, encapsulate them, and test that they function. The back-end tier historically added marginal value relative to the front-end, but advanced packaging has inverted that pattern — CoWoS, Foveros, I-Cube, SAINT, and hybrid bonding now represent some of the highest-value-added steps in the chain, and advanced packaging capacity is the binding constraint on AI accelerator production globally.

The operator landscape for packaging and test divides into four distinct categories with different competitive dynamics and strategic roles.

The Four Operator Categories

The four categories are not strictly hierarchical — a given package can flow through any of them depending on the customer, the product, and the complexity tier. An NVIDIA H200 accelerator is packaged at TSMC captive CoWoS (foundry-captive). An Apple Watch SiP is packaged at ASE (merchant OSAT). An Intel Xeon is packaged at Intel's own back-end facilities (IDM captive). A Samsung-produced HBM stack is packaged at Samsung Memory back-end (IDM captive) before being shipped to TSMC for integration into a CoWoS module for an NVIDIA product — meaning a single AI accelerator module touches multiple packaging-facility categories across its assembly.

The Merchant OSAT Tier

The merchant OSAT tier is the volume backbone of semiconductor packaging globally. ASE Technology (Taiwan) is the global leader by revenue, with broad capability across commodity and advanced packaging and integrated test services. Amkor Technology (US-headquartered, global operations) is the strongest non-Asian OSAT with particular strength in automotive packaging and the flagship U.S. reshoring project for OSAT capacity at its Arizona facility. JCET (China) is the third-largest globally, built partly through the STATS ChipPAC acquisition that gave it global site footprint. Together these three operators produce the majority of volume-tier semiconductor packages worldwide.

The competitive dynamic at the merchant OSAT tier has been characterized by increasing capability investment as advanced packaging requirements have grown. ASE's FOCoS platform and FOCoS-Bridge variant compete directly with foundry-captive bridge architectures at the mid-performance tier. Amkor's SWIFT and SLIM platforms serve volume mobile, automotive, and networking applications. JCET's fan-out portfolio covers broad Chinese fabless customer demand. The tier is covered in full detail on OSAT Landscape.

Foundry-Captive Packaging — The Advanced Packaging Tier

Foundry-captive packaging has become the most strategically significant packaging category because it houses the leading-edge advanced packaging architectures that enable AI accelerators, HPC processors, and flagship SoCs. TSMC CoWoS capacity is the binding global constraint on AI accelerator shipment volume — every NVIDIA, AMD, Google, Amazon, Microsoft, and hyperscaler custom AI accelerator in production today requires CoWoS allocation at TSMC's Taiwan advanced packaging facilities. Samsung I-Cube and SAINT serve Samsung Foundry customers and leverage Samsung's captive HBM and DRAM for distinctive integration. Intel Foveros and EMIB operate at Intel Oregon and New Mexico advanced packaging facilities and serve both internal Intel products and external Intel Foundry Services customers.

The foundry-captive model has structural advantages for leading-edge advanced packaging. Co-designing the packaging process with the front-end logic process enables yield coordination, process matching, and faster design iteration. Customers who have their logic die fabricated at TSMC can access TSMC advanced packaging without a separate qualification cycle. This integration is why the three major foundries have built captive advanced packaging capacity rather than relying on merchant OSATs for their flagship advanced packaging programs — despite having long-standing partnerships with Amkor and ASE for mid-tier packaging. See Advanced Packaging for the architecture-level view.

IDM Captive Packaging

IDM captive packaging reflects the vertically integrated manufacturing strategy that predates the foundry-fabless model. Intel has historically packaged its own Xeon and Core processors at captive back-end facilities (Vietnam, Malaysia, Costa Rica, Chengdu) — a strategy rooted in the original Intel IDM model. Samsung Memory, SK hynix, and Micron all package their own DRAM and NAND products at captive facilities, with HBM packaging as a particularly strategic captive capability given HBM's scale-up importance for AI accelerator markets.

The HBM captive packaging position is increasingly distinctive because HBM production itself is highly concentrated at three memory IDMs and each IDM's HBM packaging capacity directly affects its ability to serve the AI accelerator customer base. SK hynix's Icheon HBM packaging, Samsung Memory's packaging, and Micron's memory packaging capacity in Taiwan and the US are strategic assets that distinguish the memory IDM model from the fabless-memory alternative. See HBM for the chip-type view of this concentration.

Geographic Concentration

Packaging and test capacity is more geographically distributed than wafer fab capacity but still carries significant concentration patterns. Taiwan hosts ASE (headquartered in Kaohsiung) plus TSMC captive advanced packaging (AP6/AP7/AP8 facilities) — making Taiwan the single most concentrated packaging jurisdiction globally. China hosts JCET plus Tongfu, Huatian, and the Chinese mature-node packaging ecosystem serving domestic fabless customers. Korea hosts Amkor Korea plus Samsung Memory and SK hynix captive packaging. Japan hosts Kioxia memory packaging plus specialty operators. Southeast Asia (Malaysia, Philippines, Vietnam) hosts significant Amkor, Intel, and specialty capacity. The U.S. hosts Amkor Arizona (under CHIPS Act expansion), Intel New Mexico advanced packaging, and growing specialty capacity under reshoring programs.

The merchant OSAT geographic footprint is more distributed than the foundry-captive advanced packaging footprint because merchant OSATs have historically built sites in multiple regions to serve regional customer bases and optimize labor costs. Foundry-captive advanced packaging tends to concentrate near the foundry's own fab sites — TSMC's advanced packaging near its Taiwan fabs, Samsung's near its Korean fabs — because the wafer-to-packaging logistics benefit from short transit.

Related Coverage

Parent: Fab Facilities

Peer facility types: Wafer Fabs · Standalone Test Houses

OSAT deep reference: OSAT Landscape

Advanced packaging architectures: Advanced Packaging · CoWoS · Foveros · I-Cube · SAINT · FO-WLP

Related assembly topics: Back-End Assembly & Packaging · Advanced Packaging Test

Cross-pillar dependencies: AI Accelerators (CoWoS-constrained) · HBM (IDM captive)

Strategic framing: Bottleneck Atlas · U.S. Reshoring