Substrates & Interposers

Substrates and interposers are the carrier layer of advanced packaging. Every multi-die module — whether a CoWoS AI accelerator, an EMIB-based CPU, a Foveros 3D stack, an HBM-integrated module, or a fan-out SoC — sits on top of a substrate or interposer that does the electrical and mechanical work of connecting the dies to each other and to the outside world. The substrate is the foundation layer underneath the package. The interposer, when present, is an intermediate layer between the dies and the substrate that provides the high-density die-to-die interconnect that the substrate alone cannot support.

Four carrier technologies span the full range of advanced packaging: organic substrates (ABF-based FCBGA laminates, the dominant carrier for every flip-chip high-performance package), silicon interposers (thick silicon layers with TSVs, enabling 2.5D CoWoS and I-Cube architectures), silicon bridges (small silicon pieces embedded in organic substrates, enabling EMIB and CoWoS-L), and glass substrates (emerging alternative under pilot at Intel, Samsung, and Corning with real volume expected later this decade). The concentration profile for each is tight: ABF laminate is near-sole-source at Ajinomoto; advanced FCBGA fabrication is a five-company oligopoly (Unimicron, Ibiden, Nan Ya PCB, Shinko Electric, AT&S); silicon interposer fabrication runs captive at the foundries producing the logic dies (TSMC, Samsung, Intel); and glass substrate infrastructure is being built from scratch by a small set of major players.

Substrate supply has been one of the most visible back-end bottlenecks of the AI accelerator buildout. Advanced FCBGA substrate lead times extended past 40 weeks at the 2022–2024 peak; ABF laminate availability was an explicit supply-chain concern. Capacity has expanded since, but the structural concentration remains — ABF is still single-source and the five substrate fabricators cannot add capacity on quarters-scale timelines. This is the canonical "ground truth" concentration story in advanced packaging and is covered from the bottleneck angle at Bottleneck Atlas.

Substrate vs. Interposer: The Structural Distinction

The substrate and the interposer are different layers doing different jobs. In a simple flip-chip package, only a substrate is present — the die sits directly on the organic substrate, which connects to the board. In a 2.5D module, an interposer sits between the dies and the substrate, providing high-density inter-die routing that the substrate cannot deliver. The interposer itself then sits on a substrate for board connection.

The interconnect density difference is the reason interposers exist. A modern HBM stack has over 1,000 signals per stack; connecting four HBM stacks to a logic die requires thousands of fine-pitch connections at tens of micrometers pitch or finer. No organic substrate can deliver that routing density. A silicon interposer fabricated using damascene copper back-end-of-line processes at a foundry routes those signals across a few millimeters of silicon at a pitch and density equivalent to lower metal layers of the foundry's own process technology. The substrate underneath handles board-level connections — power, ground, lower-speed I/O, mechanical mount — at its own coarser routing density.

Organic Substrates (FCBGA / ABF-Based)

Organic substrates are the volume carrier for every flip-chip package and for every multi-die module at the board-level connection layer. The construction is a laminated stack of core material and build-up layers. The core is a glass-epoxy composite (typically FR-4 family or BT resin); build-up layers are dielectric films with copper traces patterned on each layer and vias between layers. Ajinomoto Build-up Film (ABF) is the dominant dielectric for the build-up layers in advanced FCBGA substrates, providing the fine-line capability and dimensional stability that modern high-pin-count flip-chip packages require.

ABF is a Japan-origin specialty material from Ajinomoto Co. — the same company whose food-additive business funds the materials R&D. ABF has no direct equivalent in the market; alternatives exist but none at the scale and qualification depth of ABF. Every advanced FCBGA substrate globally — for every server CPU, every GPU, every AI accelerator, every high-end FPGA — uses ABF-family dielectric in its build-up layers. This makes Ajinomoto's production capacity a direct constraint on the global advanced packaging supply chain.

Substrate fabrication is a five-company oligopoly. Unimicron (Taiwan) leads by revenue with the broadest customer base. Ibiden (Japan) holds a technology-leadership position particularly strong at Intel and Nvidia. Nan Ya PCB (Taiwan, AU Optronics affiliate) is a major supplier to multiple leading fabless customers. Shinko Electric (Japan) supplies advanced packages for high-performance computing. AT&S (Austria) is the European specialist and is expanding capacity in Malaysia to serve global AI customers.

Substrate fabrication is capital-intensive and long-cycle. A new substrate line takes 18–24 months from announcement to first production, and advanced substrate qualification at a customer takes additional quarters of pattern development, yield ramping, and reliability verification. This makes substrate capacity slow to respond to demand shifts and explains why the 2022–2024 AI buildout produced such extended lead times — demand scaled faster than supply could respond, and the qualification barrier prevented rapid substitution across suppliers.

Silicon Interposers

Silicon interposers are thick silicon layers — typically 100 µm after thinning — that carry TSVs (through-silicon vias) and one or more back-end-of-line copper routing layers. Their role is to provide the high-density die-to-die routing in 2.5D architectures where multiple dies sit side-by-side on the interposer and must communicate at bandwidth that organic routing cannot support. The most visible example is CoWoS, where a logic die and two to eight HBM stacks sit on a silicon interposer that routes the thousands of signals between them.

Silicon interposers are fabricated at the foundries that make the logic dies. TSMC fabricates its own CoWoS interposers at its back-end-of-line facilities in Taiwan and (as capacity ramps) Arizona. Samsung Foundry fabricates I-Cube interposers captive. Intel fabricates interposers for its advanced packaging programs. SK hynix fabricates the base-die interposers for HBM stacks. There is no merchant market for advanced silicon interposers — the fabrication capacity lives inside the foundry that is also producing the logic die, and the interposer is treated as part of the foundry's advanced packaging offering rather than a separately procurable substrate.

Interposer size is one of the growth pressures in advanced packaging. Early CoWoS interposers fit within a single photolithography reticle field (roughly 858 mm² at foundry reticle limit). Current-generation AI accelerator modules have grown beyond the reticle limit, requiring stitched or reticle-extending interposers — a fabrication challenge that pushes yield and reticle economics. TSMC has disclosed CoWoS variants with interposer area well beyond the reticle limit, and beyond-reticle interposer capability has become a competitive differentiator.

Silicon Bridges

Silicon bridges are a cost-optimized alternative to full silicon interposers. Instead of fabricating a large interposer that spans the full module footprint, a small silicon piece — a "bridge" — is embedded in the organic substrate exactly where high-density die-to-die connection is needed. Over the rest of the substrate area, standard organic routing handles power, ground, and lower-speed signals. The bridge handles only the high-density inter-die routing.

The economics are favorable. A silicon bridge is small (typically tens of square millimeters), can be fabricated at a foundry at much lower wafer area cost than a full interposer, and uses the organic substrate for the majority of the module's mechanical footprint. Intel's EMIB is the leading silicon-bridge implementation. TSMC's CoWoS-L is a more recent silicon-bridge variant within the CoWoS family.

Silicon bridge fabrication happens at the foundries producing the logic dies (Intel captive for EMIB, TSMC for CoWoS-L) and at specialty substrate fabricators who can embed the bridges into organic substrate stacks. Bridge embedding in the substrate is a specialty process with its own qualification depth at the substrate fabricator layer.

RDL Interposers

RDL (Redistribution Layer) interposers route die-to-die and die-to-substrate connections through thin-film copper layers patterned on a temporary or permanent carrier. They are cheaper than silicon interposers and simpler than silicon bridges but provide lower routing density than silicon. CoWoS-R is TSMC's RDL-based variant. FO-WLP and FOPLP (fan-out packaging) use RDL routing over reconstituted wafers or panels as their core integration method.

RDL interposer capability is distributed across foundries and advanced OSATs. ASE, Amkor, and JCET operate FO-WLP lines at scale; Samsung and TSMC operate captive FO capacity; emerging FOPLP capacity expands the footprint further. RDL interposers serve mid-performance and cost-sensitive multi-die integration, sitting between the cost-optimized organic substrate floor and the high-performance silicon interposer ceiling.

Glass Substrates

Glass substrates are the emerging alternative to organic substrates for next-generation high-performance packaging. The structural advantages are significant: glass has much better dimensional stability than organic laminate (lower warpage under thermal cycling), supports much finer line/space routing than ABF-based organic substrates (down to sub-2 µm vs. 10 µm at the organic floor), and has a CTE much closer to silicon than organic substrates (reducing thermal-cycling stress on solder joints). The disadvantages are also significant: glass is mechanically brittle, requires new fabrication processes not native to the organic substrate supply chain, and requires new packaging equipment for handling and via formation.

Glass substrate development is concentrated at a small set of major players. Intel has disclosed glass substrate production readiness later this decade as part of its advanced packaging roadmap. Samsung has glass substrate development programs. Corning (the glass-technology major) supplies glass substrates to multiple partners and operates its own packaging-glass R&D. Applied Materials has disclosed glass substrate via-formation equipment. Pilot production is underway; volume ramp is expected in the latter half of this decade with meaningful revenue impact thereafter.

Glass substrates do not replace organic substrates for the volume high-performance tier in the near term — the supply chain and equipment ecosystem have to be built from scratch. The likely path is phased adoption at the leading edge (first in specialty AI accelerators and very-high-performance parts) with gradual expansion as capacity and qualification depth grow.

Ceramic Substrates

Ceramic substrates serve the high-reliability corner of the market — aerospace, space, military, high-temperature industrial — where the hermeticity, thermal stability, and radiation tolerance of a ceramic package justify the cost and form-factor penalty over organic substrates. Ceramic substrate supply is a specialty market with long-standing vendors (Kyocera, NGK Spark Plug, CoorsTek, ceramic-package specialists in Japan and the U.S.) serving a smaller, slower-growing volume base than the organic substrate mainstream.

Ceramic substrates are relevant to the rad-hard and rad-tolerant device ecosystem covered at Rad-Hard / Rad-Tolerant, and to specialty RF, laser diode, and high-reliability industrial applications. They are not a volume driver for the advanced packaging mainstream but remain structurally important to the aerospace and defense supply chain.

The ABF Single-Supplier Story

Ajinomoto Build-up Film is the canonical single-supplier dependency in advanced packaging. ABF is used in essentially every high-pin-count FCBGA substrate worldwide; Ajinomoto is the near-sole-source producer of the film itself; and no qualified alternative exists at comparable performance and volume. The five substrate fabricators all buy ABF from Ajinomoto and convert it into finished substrates — they do not produce the dielectric themselves.

Ajinomoto has expanded ABF production capacity in response to demand, and the ABF shortage that peaked in 2022–2024 has eased at the material level. But the structural single-supplier exposure remains, and alternate-film development is ongoing at Japanese and Taiwanese material suppliers without producing a qualified substitute at scale. Glass substrates, if they ramp to volume later this decade, would be the first meaningful architectural alternative to the ABF-based organic substrate path.

Capacity Expansion & Reshoring

Advanced substrate capacity is being expanded globally in response to AI buildout demand and to geographic-diversification industrial policy. Unimicron, Ibiden, Nan Ya PCB, Shinko, AT&S, and Samsung Electro-Mechanics are all executing multi-year capacity expansions. AT&S's Malaysia build is among the largest Western-owned advanced substrate capacity expansions. LG Innotek's entry into advanced FCBGA has added a new Korean source. The CHIPS Act provides explicit funding for advanced packaging, including substrate-adjacent capability, though organic substrate production itself remains concentrated in East Asia.

Silicon interposer capacity expands alongside foundry advanced packaging capacity — TSMC CoWoS expansion, Samsung I-Cube expansion, Intel advanced packaging expansion at New Mexico, Oregon, and Arizona. Glass substrate capacity is being built greenfield at Intel, Samsung, Corning, and their partners. The overall trend is broader capacity at still-concentrated operators rather than a diffusion of production across many new entrants — the capital intensity and qualification depth continue to favor incumbents.

Related Coverage

Parent: Advanced Packaging

Peer advanced-packaging foundations: Advanced Interconnects (Hybrid Bonding)

Architectures that depend on these layers: CoWoS · EMIB · Foveros · I-Cube · FO-WLP

Upstream process context: Flip-Chip Bonding (substrate interface at attach)