Semiconductor Wafer Dicing

Dicing is the first physical transformation inside back-end assembly. A tested, sorted wafer — still a single disk of 200 mm or 300 mm silicon holding hundreds to tens of thousands of dies — arrives at the assembly floor. Dicing separates that wafer into individual dies, each ready to be picked up and bonded into a package. Before the separation itself, the wafer is thinned (backgrind) to its target final thickness. After separation, the dies remain on an adhesive tape frame from which they are picked one at a time by the die-attach station downstream.

The concentration story for dicing is narrow and deep: Disco Corporation (Japan) holds the dominant share of saw dicing and grinding equipment globally, with Accretech (Tokyo Seimitsu) as the primary alternative source and ASMPT as a broader packaging-equipment supplier with dicing capability. Laser dicing equipment concentrates at Disco, Accretech, and Synova. Plasma dicing — a specialty method growing in relevance for advanced nodes and thin wafers — concentrates at Plasma-Therm and Oxford Instruments. Consumables (saw blades, dicing tape, UV-release films) form a specialty layer dominated by Disco (blades), Lintec, Mitsui Chemicals, Nitto Denko, and Furukawa (tapes).

The Dicing Flow

Dicing is not a single step. It is a short sub-sequence that begins when the sorted wafer arrives and ends when individual dies sit on a frame ready for pickup. Each sub-step uses its own equipment class and has its own yield-loss mechanisms.

Backgrind: The Thinning Step

Backgrind precedes separation and is the more capital-intensive of the two operations at most assembly lines. A finished wafer exits front-end fabrication at roughly 725–775 µm thick (300 mm wafer standard) — more than ten times the final thickness required for most packages. Backgrind removes the bulk silicon from the back side of the wafer while the device layer on the front side is protected by a backgrind tape laminated during the prior step.

Target thickness depends on the package. Standard wire-bonded and flip-chip packages run 150–200 µm final thickness. Mobile and wearable applications drive thinner — 75–100 µm is common, with 50 µm and below for the thinnest flip-chip devices. 3D stacking with through-silicon vias (TSVs) drives the most extreme thinning: the wafer must be ground down to expose the TSVs from the back side, often below 50 µm, which makes it mechanically fragile to the point where specialized carrier wafers and temporary bonding are required to handle it through subsequent steps. Backgrind equipment concentrates at Disco, Okamoto, and Accretech.

Subsurface damage is the primary yield concern during backgrind. The grinding wheels introduce micro-cracks a few micrometers deep into the back surface; if the wafer is ground thinner than the damage depth, strength drops sharply and breakage rates rise. Modern backgrind processes use a coarse grind followed by a fine grind and a final polish or chemical-mechanical polish step to remove the damage layer and recover strength at thin targets.

Separation Methods

Four separation methods are in industrial use: saw dicing (the dominant method by wafer volume), laser dicing, stealth dicing, and plasma dicing. Selection depends on wafer thickness, die dimensions, material system, and end-use reliability requirements. Most high-volume assembly lines run saw dicing as the workhorse with laser or stealth dicing qualified for specialty applications.

Saw dicing remains the volume default. The kerf-width cost (each cut line consumes silicon that could have been die area) is acceptable at mature nodes where die sizes are large relative to the kerf. At advanced nodes with very small dies, the kerf-to-die-area ratio becomes material and laser or plasma dicing becomes attractive. Low-k and ultra-low-k dielectrics used at leading-edge logic are particularly vulnerable to saw-induced cracking, which has driven broader laser dicing adoption at 7 nm and below. Compound semiconductors (SiC, GaN, GaAs) and compound-semiconductor substrates are harder than silicon and brittle enough that saw dicing blades wear rapidly and chipping is persistent — laser dicing and stealth dicing have higher adoption in these material systems.

Equipment Concentration

Dicing equipment is one of the most concentrated categories in all of semiconductor back-end. Disco Corporation's share of the saw dicer market is structural, built over decades on a combination of precision engineering, blade supply integration, and an installed base that makes qualification on alternate platforms costly for customers.

Consumables

Dicing consumables run steadily through the process and form a meaningful recurring cost line at high-volume operations. The two largest consumable categories are saw blades and dicing tapes.

UV-release dicing tapes are the standard for pickup downstream: the tape is tacky enough to hold dies through dicing, then UV exposure reduces the adhesion so each die lifts cleanly onto the die-attach tool's pickup collet. Tape uniformity and adhesion consistency directly affect pickup yield, and tape is one of the quiet bottlenecks during industry supply disruptions — a Japan-centered supply base that surfaces intermittently on supply-chain risk lists.

Yield & Cost Mechanics

Dicing yield at a mature line runs well above 99% in normal operation. Most of that loss is mechanical: edge chipping, corner cracking, handling damage during tape transfer. Loss at dicing is direct — there is no rework once a die is cracked — so the step is tightly monitored with automated optical inspection after separation. For wafers carrying high-value dies (CPUs, GPUs, AI accelerators with hundreds or thousands of dollars of content per die), yield pressure is intense; for high-volume low-ASP parts (MCUs, analog), the same absolute yield loss is less economically material but still matters in aggregate.

Cost per die at dicing is small in absolute terms — blade and tape consumables, machine time, cleanroom overhead — but scales with several factors. Thinner wafers require more care (more passes, slower feed rates, better-qualified equipment) and drive up cost per die. Large wafer areas with small dies require more total cutting distance and drive up cost. Compound semiconductors drive up blade wear and replacement frequency. Ultra-low-k dielectrics at leading-edge nodes require laser dicing, which is slower and more capital-intensive than saw.

Cleanroom Class

Dicing cleanrooms run at Class 1000 or looser — substantially less stringent than front-end fab cleanrooms at Class 1 to Class 10. The device surface is already passivated and pad-metallized by the time the wafer arrives for dicing; particle contamination in the dicing area is a yield and reliability risk but not the same defect-density driver as in lithography or implant. Water and debris control is the dominant environmental concern during saw dicing. Plasma dicing operates in a partial vacuum and is less sensitive to ambient particles by design.

Market Outlook

Dicing equipment demand tracks packaging demand broadly, with an additional growth driver at the intersection of thin wafers, 3D stacking, and compound semiconductors. HBM stacks require thinned-and-TSV-exposed dies — direct demand for precision backgrind and low-stress separation. Advanced AI accelerator modules with chiplet integration push the same thinning curve. SiC and GaN power device volumes drive laser and stealth dicing adoption. Plasma dicing adoption is growing as a specialty answer to ultra-thin advanced-node applications but remains a small share of the overall tool base.

Saw dicing will remain the workhorse for the mature-node, high-volume, wire-bonded and flip-chip baseline — the economic majority of semiconductor units — for the foreseeable future. The advanced-packaging end of the dicing equipment market is where the next decade of growth, concentration risk, and strategic equipment-supply dynamics will be most visible.

Related Coverage

Parent: Back-End Assembly

Peers in back-end assembly: Die Attach · Bonding Overview · Encapsulation · Final Test

Upstream flow context: Wafer Test (Sort)

Equipment & consumables supply: Fab Equipment · Fab Consumables

Cross-pillar dependencies: HBM (TSV reveal grinding) · SiC & GaN (compound-semiconductor dicing) · Advanced Packaging (ultra-thin die separation)